Hi, The configuration in source code are not decided depending on any specific architecture. One needs to change it depending on what architecture they are targeting. If you read papers who have used gem5, they always target a particular architecture (skylake, coffee lake, or any and or arm, etc) and change parameters accordingly
On Sun, Mar 1, 2020 at 5:06 PM Chang Hyun Park <[email protected]> wrote: > Hello all, > > I ran into a question while looking through the `cacheLoadPorts` and > `cacheStorePorts` variable in `src/cpu/o3/O3CPU.py`[1]. > > The default values are set to 200, and a search through GitHub shows > that this default value seems to be always used. (At least for the > provided example configurations) > > My question is doesn't this value look way too large? > It is known that the Intel Skylake microarchitecture has two loads and > one store ports.[2] > > Should we change the cacheLoadPorts and cacheStorePorts to two and > one, respectively for more accurate results? > > Thank you, > Chang Hyun Park > > [1] > https://github.com/gem5/gem5/blob/ca1d09608e52f6ca8db8c2288b292731c4cee739/src/cpu/o3/O3CPU.py > [2] > https://en.wikichip.org/wiki/intel/microarchitectures/skylake_(client)#Scheduler_Ports_.26_Execution_Units > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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