Hi all, To avoid sending the response to CPU in case of a prefetch request, while giving the response in recvTimingResp(), it will check the target source, if it is a prefetch it will delete the req and the packet. Now, if a prefetch request from L1 is a miss in L1 and as well as a miss in L2. Then the block from memory when it reaches L2, in recvTimingResp(), it will fill the block in L2, and it identifies the request as a prefetch and deletes the req and the packet. So this request will not be forwarded to the L1 cache. Is my understanding correct?
Thanks, Saideepak. _______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
