Hi everyone: I have ran a C language benchmark containing SVE intrinsics in gem5. When I adapt the different SVE vector bit width in se mode, I will get some performance improvement. However, the performance changed hardly in fs mode, even irregular. I wonder why ithappens?The following is the command I used in gem5 se mode: $ ./build/ARM/gem5.opt -d sve_se/ configs/example/se.py -c ./benchmark/demo --cpu-type="O3_ARM_v7a" --caches --param 'system.cpu[:].isa[:].sve_vl_se = 2'
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