with ARM On 10/22/2020 00:23, chy wrote:
HELP !!!!!!!!! I intend to use gem5's **FS** mode to test SMT performance in my research project. Specifically, I modified the create() function of deriv.cc, I changed actual_num_threads=1 to actual_num_threads=numThreads, and deleted the assert (this->numThreads==1) of the constructor in cpu.cc. Moreover, gem5 can be started but m5term does not have corresponding output, and gem5 outputs "warn: instruction'csdb' unimplemented" and "warn: GIC APRn write ignored because not implemented: 0xd0". May I ask what the reason behind the SMT can't function under gem5 fs mode? Which modules should I modify to complete the function of SMT under the FS mode? If gem5 does not function at the current stage,I can add the code myself to make the SMT work. If I can make it work, I will also upload my code to help others in need. Any means of help is hugely appreciated by myself and fellow coworkers in my project. Thank you all in advance.
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