Hello Zhen,
Icache is the reference to the L0-instructions cache and Dcache is the
one to the L0-data cache. It's usual to find the first level of a
conventional cache hierarchy split into instructions and data.
The purpose of the assert is, basically, to check that the same block is
not present in both structures (L0I and L0D) at the same time since a
block should be either a data block or an instruction block.
All the best,
Carlos
On 23/1/21 10:13, zhen bang via gem5-users wrote:
Hello everyone:
I have changed my MESI_Three_Level-L0cache.sm, but panic: Runtime error, assert
failure.
void setState(TBE tbe, Entry cache_entry, Address addr, State state）
assert((Dcache.isTagPresent(addr) && Icache.isTagPresent(addr)) == false);
if(is_valid(tbe)) {
return tbe.TBEState;
} else if (is_valid(cache_entry)) {
return cache_entry.CacheState;
}
I don't know the purpose of assert((Dcache.isTagPresent(addr) &&
Icache.isTagPresent(addr)) == false), Icache and Dcache are different, I don't know
what does mean?
Looking forward to your reply.
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