Hi Haseung, Got it, thanks for your reply.
Maybe we can add some new opClass for the different implementation. Cheers, Zhong 봉하승 via gem5-users <gem5-users@gem5.org> 于2023年3月6日周一 11:53写道： > Hi, > > IPR is Interrupt Priority Register in ARM. > > I looked it up, > > But Instructions used to access the IPR can vary depending on the specific > implementation of the processor and the Interrupt Controller being used. > > So, I think that why the Instructions classified as ‘IprAccess’ is not > implemented in advance? > > > Thanks > > Haseung > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-le...@gem5.org >
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