Hi

I was playing with the number of physical registers for an experiment. I
observe the following:

ARM config file has numPhysVecRegs to be 48. This means after gem5
initializes the rename map (in cpu constructor  src/o3/cpu.cc ) the size of
the free list should be 48 - architectural registers, i.e, 48 -32 = 16.
However, I see that the free list size after the rename map initialization
for VectorRegisters is 4. Which means the architectural registers are 44 in
number. I am not sure if that's the case. Please correct me if I am wrong.
Also, a free list size of 4 essentially means that considering instructions
with single destination registers, there can be only 4 of them in flight at
a moment till the new instruction commits and previous physical registers
are freed up from the renameHistory buffer. But I think that's too less.

This happens with the numPhysIntRegs (128), Post rename-map
initialization it comes to be 86 ie 42 architectural registers. Which
should not be the case.

What do you think?


Thanks

-- 
*GS Nitesh Narayana <https://nitesh8998.gitlab.io/>*
Departament d'Arquitectura de Computadors

Webpage: nitesh8998.gitlab.io
_______________________________________________
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org

Reply via email to