Hi Eduardo,
Here is a short example to run 8 gobmk programs on 8 cores CMP
configuration in M5 SE.
Meng-Ju
# Simple test script
#
# "m5 test.py"
import m5
from m5.objects import *
import os, optparse, sys
m5.AddToPath('./configs')
import Simulation
from Caches import *
import Mybench
# Get paths we might need. It's expected this file is in m5/configs/example.
config_path = os.path.dirname(os.path.abspath(__file__))
print config_path
config_root = os.path.dirname(config_path)+"/configs"
print config_root
m5_root = os.path.dirname(config_root)
print m5_root
parser = optparse.OptionParser()
# Benchmark options
parser.add_option("-b", "--benchmark", default="",
help="The benchmark to be loaded.")
parser.add_option("-c", "--chkpt", default="",
help="The checkpoint to load.")
execfile(os.path.join(config_root, "configs", "Options.py"))
(options, args) = parser.parse_args()
if args:
print "Error: script doesn't take any positional arguments"
sys.exit(1)
#process = EioProcess(file = options.eio)
if options.benchmark == 'perlbench':
process = Mybench.perlbench
elif options.benchmark == 'gobmk':
process = [Mybench.gobmk, Mybench.gobmk1,
Mybench.gobmk2,Mybench.gobmk3,Mybench.gobmk4,Mybench.gobmk5,Mybench.gobmk6,Mybench.gobmk7];
elif options.benchmark == 'test':
process = Mybench.test
if options.chkpt != "":
process.chkpt = options.chkpt
(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
CPUClass.clock = '2GHz'
np = options.num_cpus = 8
cmt_cpus = [CPUClass(cpu_id = i) for i in xrange(np)]
# ----------------------
# Create a system, and add system wide objects
# ----------------------
system = System(cpu = cmt_cpus,
physmem = PhysicalMemory(range=AddrRange("2048MB")),
membus = Bus())
system.toL2bus = Bus()
system.l2 = L2Cache(size = '2MB')
# ----------------------
# Connect the L2 cache and memory together
# ----------------------
system.physmem.port = system.membus.port
system.l2.cpu_side = system.toL2bus.port
system.l2.mem_side = system.membus.port
# ----------------------
# Connect the L2 cache and clusters together
# and the load balancer
# ----------------------
for cpu in cmt_cpus:
cpu.addPrivateSplitL1Caches(L1Cache(size = '64kB'),
L1Cache(size = '64kB'))
cpu.mem = cpu.dcache
cpu.connectMemPorts(system.toL2bus)
for i in xrange(np):
system.cpu[i].workload = [process[i]]
root = Root(system = system)
Simulation.run(options, root, system, FutureClass)
_______________________________________________
m5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
