I ran a test that tried to switch back to a a set of timing simple
CPUs after running with the O3 cpus for a while, but the simulator
just goes off into space. Using a fresh set of simple CPUs solves the
problem, but I was curious if someone might know of an inherent reason
why switching back did not work. If a user wanted to switch back and
forth multiple times (perhaps executing a set of simpoints with O3,
and the rest with simple timing to get accurate cache modeling),
having to have all new sets of cores for each part would be annoying
(though still doable). For a scheme where the switching is more
dynamic, this solution would not be feasible.
- Clint Smullen
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