Actually this is a hardware coherence protocol issue and is unrelated to Linux. You probably need to increase the number of MSHRs in one of your downstream caches. In general the number of MSHRs in a given cache should be roughly equal to (probably slightly greater than) the sum of the MSHRs of all the caches above it (i.e., closer to the CPU) so that it can handle all possible outstanding accesses.
Steve On Fri, May 29, 2009 at 9:04 AM, Shoaib Akram <[email protected]> wrote: > with linux2.6.27 I have been able to boot 24 cpus. However, beyond that I > get the error,"need to implement cache resending nacked packets"... > > does the linux scheduler is a limiting factor on number of cpus or M5? > > ---- Original message ---- > >Date: Thu, 28 May 2009 14:41:38 -0700 > >From: Rick Strong <[email protected]> > >Subject: Re: [m5-users] More than 4 cpus in FS mode > >To: M5 users mailing list <[email protected]> > > > >Assuming that you are using alpha ISA, they have the steps mentioned in > >the FAQ. "BigTsunami support is included in the standard M5 Alpha > >build, but booting with more than 4 CPUs requires modifications to the > >PAL code and kernel as well. Take a look at the Download page for our > >Linux patches and modified PAL code. Note that even with the BigTsunami > >changes, simulatin". Here is the download page: > >http://www.m5sim.org/wiki/index.php/Download > > > >So you need need to download the latest patched linux kernel and make > >sure M5 boots with that kernel. You also need to download the latest > >palcode and make sure M5 uses that palcode. With that said, I have not > >seen a successfull boot of more than 16 cores for linux 2.6.18, but > >others have. > > > >Best of luck, > >-Rick > > > >Shoaib Akram wrote: > >> I dont quite undestand the steps required to boot more than 4 cpus in FS > mode. Can anyone with experience comment? > >> _______________________________________________ > >> m5-users mailing list > >> [email protected] > >> http://m5sim.org/cgi-bin/mailman/listinfo/m5-users > >> > >> > > > >_______________________________________________ > >m5-users mailing list > >[email protected] > >http://m5sim.org/cgi-bin/mailman/listinfo/m5-users > _______________________________________________ > m5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users >
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