I generally use cscope to find things in the source. There's a script to build a cscope index in util/cscope-index.py.
Steve On Thu, Jul 16, 2009 at 10:28 AM, soumyaroop roy<[email protected]> wrote: > Hello Devraj, > > contextId() is defined in request.hh > > s...@theoracle:~/work/m5-stable$ grep "contextId()" `find ./src/mem -name > "*.hh" > ./src/mem/cache/blk.hh: return (contextId == req->contextId()); > ./src/mem/cache/blk.hh: : contextId(req->contextId()) > ./src/mem/request.hh: contextId() const > ./src/mem/physical.hh: return (contextId == req->contextId()); > ./src/mem/physical.hh: contextId(req->contextId()) > > regards, > Soumyaroop. > > On 7/15/09, Devraj Chapagain <[email protected]> wrote: >> >> Hi Steve, >> Thanks lot for your reply. >> Probably, i have not updates all the latest one. When i search >> the contextId() in my M5 (within /m5-2.0b6/src/mem/ ), I could not get it. >> Is it already defined and assigned by M5 developers or i have to myself? >> I'm really sorry for asking such minor things again and again. >> >> >> >> On Wed, Jul 15, 2009 at 6:20 AM, Steve Reinhardt <[email protected]> wrote: >>> >>> >>> On Tue, Jul 14, 2009 at 11:23 PM, Devraj Chapagain >>> <[email protected]> wrote: >>>> >>>> Hi, >>>> I am running a multi core multi-thread program on M5 under ALPHA-SE mode >>>> in SPEC CPU 2006. I can not get context id when tried to trace the >>>> parameters of packet. Is core id is context id or not? If not, how can we >>>> get the context id? >>> >>> The context ID is in req->contextId(). >>> >>>> >>>> The next problem is that when I dump the content of the block in packet, >>>> in some tick times it has no data value in it. >>>> Is it possible having no value in some tick values? if not, what can be >>>> the error for this? >>> >>> Some packets naturally do not have data (e.g., read requests as opposed >>> to read responses). >>> >>>> >>>> The last problem is when i use isInstFetch() to distinguish the content >>>> of packet as whether it is data or instruction, it always return 0 value. >>>> So, i can't distinguish whether the fetch content is data or instruction. >>> >>> Are you using the latest version of the code? There was a bug fix within >>> the past few months on this. If you're still having problems, what CPU >>> model are you using? Are you tracing from the very beginning of the >>> program? >>> >>>> >>>> Could anyone please provide me hints to figure out these problems. >>>> >>>> >>>> Thanks in advance, >>>> devraj >>>> _______________________________________________ >>>> m5-users mailing list >>>> [email protected] >>>> http://m5sim.org/cgi-bin/mailman/listinfo/m5-users >>> >>> >>> _______________________________________________ >>> m5-users mailing list >>> [email protected] >>> http://m5sim.org/cgi-bin/mailman/listinfo/m5-users >> >> >> _______________________________________________ >> m5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/m5-users > > > > -- > Soumyaroop Roy > Ph.D. Candidate > Department of Computer Science and Engineering > University of South Florida, Tampa > http://www.csee.usf.edu/~sroy > _______________________________________________ > m5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users > _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
