Hello there, The performance of M5 in simulating an inorder-timing CPU seems to be significantly lower than that in simulating an o3-timing CPU (0.33X for gzip for 10 M instructions) in their default configurations. Does that sound correct? I would expect it to be the other way around unless, of course, there are differences in their implementations which affects the performance. I am using the Alpha ISA in SE mode.
regards, Soumyaroop. -- Soumyaroop Roy Ph.D. Candidate Department of Computer Science and Engineering University of South Florida, Tampa http://www.csee.usf.edu/~sroy
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