The bug is not fixed in beta 6.  The fix is here:
http://repo.m5sim.org/m5-stable/rev/f43dbc09fad3
The reason you don't see it with m5.fast is that m5.fast disables
assertion checking.

There's no reason not to use the tip of the m5-stable repository.

Steve

On Wed, Sep 2, 2009 at 5:14 PM, Fei Hong<[email protected]> wrote:
> Hi Steve,
>
> I just changed to the beta 6 version. It is better now.
>
> The message still appear when cores number >=8 using m5.debug executable,
> but it works fine with m5.fast executable when cores number >=8.
>
> Thank you.
>
> --------------------------------------------------
> From: <[email protected]>
> Sent: Wednesday, September 02, 2009 9:00 AM
> To: <[email protected]>
> Subject: m5-users Digest, Vol 38, Issue 2
>
>> Send m5-users mailing list submissions to
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>> Today's Topics:
>>
>>   1. problem about running simulation with cores number more than
>>      8 (tithonus)
>>   2. Re: problem about running simulation with cores number more
>>      than 8 (Steve Reinhardt)
>>
>>
>> ----------------------------------------------------------------------
>>
>> Message: 1
>> Date: Tue, 1 Sep 2009 10:41:42 -0700
>> From: tithonus <[email protected]>
>> Subject: [m5-users] problem about running simulation with cores number
>> more than 8
>> To: [email protected]
>> Message-ID:
>> <[email protected]>
>> Content-Type: text/plain; charset="utf-8"
>>
>> Hi all,
>>
>> I am running the CMP simulation. It works fine with cores number <= 6.
>> However, when I try 8 cores it appears the following message.
>> ----------------------------------------------------
>>
>> Dumping Instruction List
>> Instruction:0
>> PC:0x120011f2c
>> [tid:0]
>> [sn:1756]
>> Issued:1
>> Squashed:0
>>
>> Instruction:1
>> PC:0x120011f30
>> [tid:0]
>> [sn:1757]
>> Issued:0
>> Squashed:0
>> ...
>>
>> 212: [sn:1917] not destroyed
>> 213: [sn:1918] not destroyed
>> ...
>>
>> m5.debug: build/ALPHA_SE/cpu/base_dyn_inst_impl.hh:178: void
>> BaseDynInst<Impl>::initVars() [with Impl = AlphaSimpleImpl]:
>> Assertion `instcount <= 1500' failed.
>>
>> --------------------------------------------------------------
>> I am using the SE mode. Does anyone know how to fix this problem?
>>
>> Thanks in advance!
>>
>> Fei
>> -------------- next part --------------
>> An HTML attachment was scrubbed...
>> URL:
>> http://m5sim.org/cgi-bin/mailman/private/m5-users/attachments/20090901/766f9d25/attachment.html
>>
>> ------------------------------
>>
>> Message: 2
>> Date: Tue, 1 Sep 2009 15:16:16 -0700
>> From: Steve Reinhardt <[email protected]>
>> Subject: Re: [m5-users] problem about running simulation with cores
>> number more than 8
>> To: M5 users mailing list <[email protected]>
>> Message-ID:
>> <[email protected]>
>> Content-Type: text/plain; charset=ISO-8859-1
>>
>> Are you running the latest code?  This looks like a bug that's been fixed.
>>
>> Steve
>>
>> On Tue, Sep 1, 2009 at 10:41 AM, tithonus<[email protected]> wrote:
>>> Hi all,
>>>
>>> I am running the CMP simulation. It works fine with cores number <= 6.
>>> However, when I try 8 cores it appears the following message.
>>> ----------------------------------------------------
>>>
>>> Dumping Instruction List
>>> Instruction:0
>>> PC:0x120011f2c
>>> [tid:0]
>>> [sn:1756]
>>> Issued:1
>>> Squashed:0
>>>
>>> Instruction:1
>>> PC:0x120011f30
>>> [tid:0]
>>> [sn:1757]
>>> Issued:0
>>> Squashed:0
>>> ...
>>>
>>> 212: [sn:1917] not destroyed
>>> 213: [sn:1918] not destroyed
>>> ...
>>>
>>> m5.debug: build/ALPHA_SE/cpu/base_dyn_inst_impl.hh:178: void
>>> BaseDynInst<Impl>::initVars() [with Impl = AlphaSimpleImpl]:
>>> Assertion `instcount <= 1500' failed.
>>>
>>> --------------------------------------------------------------
>>> I am using the SE mode.?Does anyone know how to fix this problem?
>>>
>>> Thanks in advance!
>>>
>>> Fei
>>> _______________________________________________
>>> m5-users mailing list
>>> [email protected]
>>> http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
>>>
>>
>>
>> ------------------------------
>>
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>> End of m5-users Digest, Vol 38, Issue 2
>> ***************************************
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