> I noticed that the M5 pal code is based on the ev5, is it possible to > make it ev6 or ev67? Or are there no benefits? > > My main overall issue I am thinking about is I am trying to see if > their is any problems in my compiled benchmarks, as I have made them > ev67 code, ev5 has given me lower ipc as well as a few problems in > unimplemented SIMD like instructions. I am not happy about my compiled > PARSEC benchmarks IPC, the main problem is I my simulations keep going > into palmode, stalling my OoO processor, and killing IPC.
While we model EV5 PAL, we more or less model the EV67 ISA (though, there may very well be missing instructions as you've mentioned.) The issues that you're seeing have more to do with the fact that most pal instructions are serializing. It's just never been anything that we've decided to optimize. Fixing it would likely require both rewriting some of the palcode and changing the way that we deal with the pal instructions in o3. My first question is, why are you entering PAL so often? Nate _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
