Hi, I need the stats from both the private and the shared cache to be from exactly the same instruction mix (thread interleaving). If I where to compare the two separate runs that wouldn't be the case as the increased number of misses in the shared cache will have an impact on execution speed resulting in a different interleaving.
I realise that I'm trying to do something that is not straightforward, I was wondering if it seems feasible to implement... Perhaps it would be more feasible to make the caches thread-aware (tagging the blocks with a contextId) and keep everything internally in one single cache. Regards, -- Kenzo On Thu, Dec 3, 2009 at 18:30, Lisa Hsu <[email protected]> wrote: > What is the reason it has to be a single run? It would be much easier to > just do two runs, one with private, one with shared. > Lisa > > On Thu, Dec 3, 2009 at 7:34 AM, Kenzo Van Craeynest > <[email protected]> wrote: >> >> Hi >> >> In a multicore configuration, is there a way to duplicate the l2 cache >> (which is shared) accesses so that each core uses the shared l2-cache >> to drive the simulation, but also sends each access to a private >> l2-cache? I'd like to have a configuration where I could compare the >> performance of the shared and the private cache in a single run. This >> seems like the easiest way to do so, but I might be mistaken ofcourse. >> >> I've already thought about (and tried) keeping duplicate (private) >> copies inside of the actual l2-cache, but it seems quite difficult to >> determine the owner of a cacherequest (the contextid of the request), >> for instance in the case of writebacks... >> >> Regards, >> >> Kenzo >> _______________________________________________ >> m5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/m5-users >> > > > _______________________________________________ > m5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users > _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
