To make sure that it worked you need a branch on the store conditional. The Linux kernel includes implementations of an atomic add: http://lxr.linux.no/#linux+v2.6.32/arch/alpha/include/asm/atomic.h and lightweight spinlocks: http://lxr.linux.no/#linux+v2.6.32/arch/alpha/include/asm/spinlock.h
you can also use a spinlock from pthreads (pthread_spin_lock) which should be about the same thing that the kernel uses. Ali On Tue, 9 Feb 2010 16:18:54 -0500, Amir Hossein Hormati <[email protected]> wrote: > Hi, > Has anyone implemented atomic add function for Alpha that works in m5? I > tried to write this using inline assembly in gcc: > > void atomic_add(volatile long* operand) > { > int temp; > asm volatile ( > "1: ldq_l %0, %1 \n" > " addl %0, 1, %0 \n" > " stq_c %0, %1 \n" > : "=&r" (temp), > "=m" (*operand) > : "m" (*operand) > ); > } > > but it does not work and I don't much about alpha instruction set. I don't > want to use operation system based mutex because that comes with a big > overhead. Does any one have a better idea? > > > Thanks, > Amir _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
