Hi All, I am trying to run the timingCPU model for X86_FS. I could make it run in atomic mode. But for the detailed timing model in X86_FS , I guess that Ruby memory model will be used because of the different locking mechanisms X86 uses rather than the regular M5 memory model. So for the X86_FS to work, I was trying to find out the locking mutex in Ruby. I found in the code of iew_impl.hh and rename_impl.hh that alpha arch. in M5 is using LL/SC mutex somewhat. Somewhere I found in the M5wiki, that X86 will use bus locking mechanisms. So I just wanted to know :-
(1) what are the h/w locking mechanisms X86 is likely to use? are those h/w mutex alreday implemented in Ruby? what's the current status of the h/w locks implementation in x86? (2) what's the code tree in Ruby memory model, I should try looking at for the different h/w locks in X86? (3)Has Ruby been integrated for the detailed memory model in X86? Please let me know. Any help will be greatly appreciated. Thanks, -Dibakar Gope Texas A&M university _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
