[m5-users] functional access in cache and memory

Mon, 24 Jan 2011 01:41:20 -0800 

in the trace file of cache memory i got something like this


243399000: system.l2: functional WriteReq d1c40
243399000: system.cpu0.dcache: functional WriteReq d1c80
243399000: system.cpu0.icache: functional WriteReq d1c80
243399000: system.cpu1.icache: functional WriteReq d1c80
243399000: system.cpu1.dcache: functional WriteReq d1c80

all are in same clock tick with same address, what does it mean?


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"Happy new Year 2011"

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