Thanks Steve! -Sheng
On Wed, Feb 2, 2011 at 1:28 AM, Steve Reinhardt <[email protected]> wrote: > Actually the cache will block as soon as the MSHRs are full; see > allocateBufferInternal() in src/mem/cache/base.hh: > > if (mq->isFull()) { > setBlocked((BlockedCause)mq->index); > } > > > Steve > > On Tue, Feb 1, 2011 at 8:45 PM, Sheng Li <[email protected]> wrote: > >> Hi Guys, >> >> I am a newbie to M5 and studying different levels of cache lockup, say >> allow cache hits to be severed when there is 1 miss, 2 misses, and n misses. >> The MSHR implementation in M5 is a great starting point. I looked at the >> code, and it seems the cache will accept new requests when the MSHR is full, >> as long as the new request is a cache hit. Only when the new request is a >> cache miss and the MSHR is full, the cache access will block. Am I right on >> this? Could anyone give some suggestions If I need to change the cache/MSHR >> so that the cache will lock up when the MSHR is full no matter whether the >> next access is a hit or not? >> >> Thanks! >> -Sheng Li >> >> _______________________________________________ >> m5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/m5-users >> > > > _______________________________________________ > m5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users >
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