You can find a tarball of an M5 version with TM (as a set of patches along with some benchmarks) for the Alpha ISA, full system and TimingSimpleCPU only at http://www.eecs.umich.edu/~blakeg.
As Nate has said, this is an older version of M5 2.0 (a build from late 2007). I would suggest that you use the patches as a guide to incorporating the coherence (the tricky part) and ISA changes into a current build of M5 so you can get support from the list, and maybe get it pushed into M5 as an option. Geoff -----Original Message----- From: [email protected] [mailto:[email protected]] On Behalf Of nathan binkert Sent: Tuesday, February 08, 2011 12:15 AM To: M5 users mailing list Subject: Re: [m5-users] Is thread level speculation (TLS) or transactional memory (TM) support available in M5 ? > Does TLS or TM support available in M5? If yes, how could it be used. If no, whether any body working on it? People have worked on this in the past, but nothing has ever been contributed back into the tree. I know that Geoff Blake at UMich did some work a while ago, but it is likely to be quite out dated. Nate _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
