Hi Joseph, Ah, you need to set the number of L2 caches and directories equal to four as well. See the comment at the top of Mesh.py "# Makes a generic mesh assuming an equal number of cache and directory cntrls". It is unfortunate that you encounter that assertion. The problem is that not all protocols have L2 or L3 cache controllers, so we can't simply add an assertion that checks to make sure that the number of L1 controllers equals the number of L2 and L3 controllers. If you have a good way of adding a better assertion, without hard coding it to particular protocols, please let us know.
Here is a sample command line that works with the Mesh network: % ./build/ALPHA_SE_MOESI_CMP_directory/m5.debug configs/example/ruby_mem_test.py -n 4 --topology=Mesh --num-l2caches=4 --num-dirs=4 DMA controllers are needed in FS mode because the full system includes devices and DMA controllers are responsible to inject device dma traffic into the Ruby memory system. In general, controllers don't directly connect to the global network. Instead they connect to a switch which acts as the network interface between the controllers and routers in the global network. Fundamentally, I'm not sure there is anything preventing one to directly connect the controllers to the global network, but I think you'll have to change some of the assumptions in Topology.cc to make that work. Brad From: [email protected] [mailto:[email protected]] On Behalf Of Joseph Pusdesris Sent: Wednesday, February 23, 2011 5:56 PM To: M5 users mailing list Subject: Re: [m5-users] Ruby questions Hi Brad! build/ALPHA_SE_MOESI_CMP_directory/m5.opt configs/example/ruby_mem_test.py -n 4 --topology=Mesh Results in: File "/home/joseph/m5/src/mem/ruby/network/topologies/Mesh.py", line 69, in ma keTopology assert(node.type == 'DMA_Controller') AssertionError Also, Why are the DMA controllers needed in FS mode? I understand that the switches all connect to the central switch, but WHY is that necessary? Why don't all the nodes connect directly to that switch with external links? Without the N switches, is it not functionally correct for some reason? Thanks for the response! -Joseph On Wed, Feb 23, 2011 at 8:45 PM, Beckmann, Brad <[email protected]<mailto:[email protected]>> wrote: Hi Joseph, The DMA controllers are only needed in full-system mode. The mesh topology should work without any DMA controllers under SE mode as well. The N+1 switches are needed because each node N attaches to a particular switch and then the N+1 switch is central switch. Garnet essentially works with many of our topologies, but since there is no documentation on how to use it, is not yet ready for large scale usage. We should have some documentation available in a next few months. And yes, Ruby does not support but interconnect models. Brad From: [email protected]<mailto:[email protected]> [mailto:[email protected]<mailto:[email protected]>] On Behalf Of Joseph Pusdesris Sent: Wednesday, February 23, 2011 5:09 PM To: m5-users Subject: Re: [m5-users] Ruby questions Bump again... -Joseph On Wed, Feb 16, 2011 at 6:54 PM, Joseph Pusdesris <[email protected]<mailto:[email protected]>> wrote: Bump. Also, when using a mesh topology, why are a bunch of DMA_Controllers needed? -Joseph On Fri, Feb 11, 2011 at 3:21 PM, Joseph Pusdesris <[email protected]<mailto:[email protected]>> wrote: Hi everyone, I have a few updated questions to ask. This is particularly aimed at Brad, but if anyone else knows, I would love some answers. Why are there n+1 switches rather than just one in the crossbar definition? That is to ask, why couldn't this snippet: ext_links = [ExtLink(ext_node=n, int_node=i) for (i, n) in enumerate(nodes)] xbar = len(nodes) # node ID for crossbar switch int_links = [IntLink(node_a=i, node_b=xbar) for i in range(len(nodes))] return Crossbar(ext_links=ext_links, int_links=int_links, num_int_nodes=len(nodes)+1) Instead be implemented as so?: ext_links = [ExtLink(ext_node=n, int_node=0) for (i, n) in enumerate(nodes)] int_links = [] return Crossbar(ext_links=ext_links, int_links=int_links, num_int_nodes=1) What is the status of garnet? I haven't seen much discussion of it on either mailing list. Is a Bus interconnect possible using either of the ruby network models? From what I can tell it's not. The gems-users mailing list seemed to agree. -Joseph _______________________________________________ m5-users mailing list [email protected]<mailto:[email protected]> http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
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