In M5 there isn't a well defined relationship between the CPU and the
caches below it other than the fact that they're connected to each
other through other parts of the memory system, and caches don't have
specific identities like being the L1 or L2. They're all just parts,
and because of the specific arrangement you've put them in (or the
script your using put them in) you could reasonably call them CPU 0's
L1, L2 etc. after the fact. My point is that out of the box the CPU
doesn't have any direct way to get at a particular cache or to
determine specifically how it's related to its caches.
To implement something like what you want, you could add a new
parameter to the CPU object that was specifically for the L2. Then, in
your script, you'd take whatever cache you considered the L2 and
assign it to that parameter. The CPU could then access that cache
directly and call whatever new functions you've added to it.
Alternatively, you could make the L2 cache object aware of how long a
cycle is and make it handle the timing for updating the counters
itself. You'd want to distinguish between the L2 and all the other
caches, perhaps by adding a parameter to say what kind it was, or by
defining a new type of SimObject that inherits from the existing cache.
Gabe
Quoting rajitha r <[email protected]>:
Hello all,
I want to update some counters which are part of the L2 cache ( BaseCache
class ) for every say 1000 cycles .How can i call this function which is
defined in basecache from the Timing cpu ?
I am new to M5. Kindly help.
Thanks
Regards,
Rajitha.R
--
_______________________________________________
m5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
