The file you'd modify is src/arch/alpha/isa/decoder.isa. The syntax for this file is found on the wiki here:
http://www.m5sim.org/wiki/index.php/The_M5_ISA_description_language When adding a blob for your instruction, you'll probably want to put the bits from the actual source and destination registers into intermediate arrays so that their components can be manipulated individually. Then, once you've computed the output, you'd take the value from the intermediate result array and move it into the destination register. The way the parser identifies sources and destinations is that anything to the left of an equals sign is considered a destination, and anything else is considered a source. Its easiest to make sure the parser understands what your doing even with complex operations like this by using intermediate variables and reading and writing what the parser sees as operands with nice, clean assignments. This also means you won't really be able to use, for instance, memcpy since the destination will be a function argument and look like a source even though it's being written to. Gabe On 03/09/11 19:49, K J wrote: > Hi All, > > Could you please tell me if I want to add a special instruction into > the Alpha ISA, which files and functions I need to modify? The M5 > version is “m5-stable-f299139501f7”. The instruction like an addition > of two vectors: > VVADD Va, Vb, Vc > For (i=0; i<128, i++) { > Vc[i]=Va[i]+Vb[i]; > } > Thank you. > > KJ > > > _______________________________________________ > m5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
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