Think of the PCs as vectors, not as scalar values. The pc when the instruction starts would be 0x120002ac4=>0x120002ac8, and it's predicted to be 0x120002ac8=>0x120002acc after the instruction executes.

Gabe

Quoting reena panda <[email protected]>:

Hi Korey,

In the inorder model, why is the branch predicted for next predicted PC at
the branch instruction? Like here, in the trace below:- The instruction has
PC
0x120002ac4, but the prediction is made for 0x120002ac8(predPC.instAddr()).

Thanks,
Reena

On Sun, May 8, 2011 at 2:58 PM, reena panda <[email protected]> wrote:

Hi,

I was checking out the branch prediction implementation in InorderCPU of
M5. I am modeling ALPHA in the SE mode.
I am seeing the following sequence of operations, which seems odd to me.
Like, the sequence num 33 was predcited taken initially, but later it was
predicted as not taken( as the PC was not present in the BTB). This was a
misprediction implies, the initial taken prediction was correct. But the
squash updates the predictor with a not taken direction(see actually taken
below). Or am I missing something here?

 648500: BranchPredictor_unit: [tid:0] [sn:33] beq        r1,0x120002ac4
... PC (0x120002ab4=>0x120002ab8) doing branch prediction
 648500: BranchPredictor_unit: [tid:0]: *Branch predictor predicted 1 for
PC* (0x120002ab4=>0x120002ab8)
 648500: BranchPredictor_unit: [tid:0]: *BTB doesn't have a valid entry.*
 648500: BranchPredictor_unit: [tid:0] [sn:33] pushed onto front of
predHist ...predHist.size(): 1
 648500: system.cpu.Branch-Predictor: [tid:0]: [sn:33]: *Branch predicted
false.*
 648500: system.cpu.Branch-Predictor: [tid:0]: [sn:33]: Predicted PC is
(0x120002ab8=>0x120002abc).

 666500: system.cpu.Execution-Unit: [tid:0] Executing [sn:33]
[PC:(0x120002ab4=>0x120002ab8)] beq.
 666500: system.cpu.Execution-Unit: [tid:0]: Misprediction detected at
[sn:33] PC (0x120002ab4=>0x120002ac4),
     squashing after delay slot instruction [sn:33].
 666500: system.cpu.Execution-Unit: [tid:0] Redirecting fetch to
(0x120002ac4=>0x120002ac8).
 666500: system.cpu.Execution-Unit: [tid:0] Squashing will start from stage
2.
 666500: system.cpu.Execution-Unit: [tid:0] [sn:33] beq
r1,0x120002ac4 ...PC (0x120002ab4=>0x120002ac4) ... Mispredicts! (Not Taken)
 666500: system.cpu.Execution-Unit: [tid:0] Executing [sn:34]
[PC:(0x120002ab8=>0x120002abc)] lda.
 666500: system.cpu.Execution-Unit: [tid:0]: [sn:34]: The result of
execution is 0x0.
 666500: system.cpu.Branch-Predictor: [tid:0][sn:33] Squashing...
 666500: BranchPredictor_unit: [tid:0]: Squashing from sequence number 33,
setting target to (0x120002ac4=>0x120002ac8).
 666500: BranchPredictor_unit: BranchPred: [tid:0]: Squashing branch
sequence number 33 , PC = 0x120002ab8, *actually_taken = 0*
 666500: BranchPredictor_unit: [tid:0]: Removing history for [sn:33] PC
(0x120002ab8=>0x120002abc).
 666500: BranchPredictor_unit: BranchPred: [tid:0]: Removing history for
[sn:33] PC (0x120002ab8=>0x120002abc), Actually Taken = 0
 666500: BranchPredictor_unit: [tid:0]: predHist.size(): 0

Actually_taken value is passed on from branch_predictor.cc, in the squash
function.
        bool taken = inst->predTaken();
        branchPred->squash(squash_seq_num, inst->readPredTarg(), taken,
tid);

Where should this inst->predTaken updated now?

Thanks,
Reena




_______________________________________________
m5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/m5-users

Reply via email to