Hi all,
I am working with X86 on M5, and I am trying to track the values that are
written back to the RF when an instructions commits. Some X86 instructions
have multiple destination registers, for instance:
182500: system.cpu.commit: apellegr TGcommit CSV, 1 ,
(0x400193=>0x40019b).(0=>
4194715), XOR_R_R : xor rbp, rbp, rbp,
apellegr Will write on register: 5
apellegr Will write on register: 32
However, in the BaseDynInst there is only a single field for the integer
result:
Result instResult;
and in the execution logic, the index of the destination register is not
even used:
--------
void BaseO3DynInst::setIntRegOperand(const StaticInst *si, int idx,
uint64_t val)
{
this->cpu->setIntReg(this->_destRegIdx[idx], val);
BaseDynInst<Impl>::setIntRegOperand(si, idx, val);
}
--------
void BaseDynInst<Impl>::setIntRegOperand(const StaticInst *si, int idx,
uint64_t val)
{
if (recordResult)
instResult.integer = val;
}
----------------------------
My question is:
Can I just look at the value of the physical register assigned to retrieve
the correct value of the destination register?
Is the "instResult" field redundant?
Thanks
-Andrea
_______________________________________________
m5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
