Hey All, Does calling m5.switchCpus move the cache connections from the existing cpu to the switch cpu as well?
I am running ALPHA_SE using the standard-switch option and restoring from a checkpoint (created cacheless using AtomicSimpleCPU). To restore from the checkpoint, test_sys.cpu = AtomicSimpleCPU with an L1 and L2 cache, and then (as per the normal behavior of standard-switch), switch_cpu = TimingSimpleCPU for a warm up period, and then finally switch_cpu_1 to my desired O3 cpu. Do the connections to the L1 and L2 caches that were originally made to the AtomicSimpleCPU in test_sys.cpu get transferred over to the switched CPUS when I call m5.switchCpus ? Or do I need to declare separate cache hierarchies for all of them? Thanks much, Alex
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