Set cacheline size to 64 for x86_64 and PPC64 architectures.
This will enable WQE prefetching for these architectures.
Signed-off-by: Jack Morgenstein <[EMAIL PROTECTED]>
Index: connectx_kernel/drivers/net/mlx4/fw.c
===================================================================
--- connectx_kernel.orig/drivers/net/mlx4/fw.c 2007-06-28 15:34:07.000000000
+0300
+++ connectx_kernel/drivers/net/mlx4/fw.c 2007-06-28 15:48:39.000000000
+0300
@@ -655,6 +655,8 @@
#define INIT_HCA_IN_SIZE 0x200
#define INIT_HCA_VERSION_OFFSET 0x000
#define INIT_HCA_VERSION 2
+#define INIT_HCA_CACHELINE_SZ_OFFSET 0x0e
+#define INIT_HCA_64_BYTE_CACHELINE_SZ 0x40
#define INIT_HCA_FLAGS_OFFSET 0x014
#define INIT_HCA_QPC_OFFSET 0x020
#define INIT_HCA_QPC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x10)
@@ -691,6 +693,9 @@
memset(inbox, 0, INIT_HCA_IN_SIZE);
*((u8 *) mailbox->buf + INIT_HCA_VERSION_OFFSET) = INIT_HCA_VERSION;
+#if defined(__x86_64__) || defined(__PPC64__)
+ *((u8 *) mailbox->buf + INIT_HCA_CACHELINE_SZ_OFFSET) =
INIT_HCA_64_BYTE_CACHELINE_SZ;
+#endif
#if defined(__LITTLE_ENDIAN)
*(inbox + INIT_HCA_FLAGS_OFFSET / 4) &= ~cpu_to_be32(1 << 1);
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