Hi there.
Inspired by article about Genode and Pandaboard, we have tried to turn on L2
cache on same board. Two patches are attached. One of them - new L2 features
for foc kernel, extracted from linux and u-boot, the other one - small example
for testing cache. This example show increasing performance on memory
operations with block sized more then L1. ( We made 4 tests: without L2, block
size equal L1, block size equal quarter of L2; with L2 for same blocks)
Based on this I make assumption what L2 work correct. But USB host driver is
stuck on boot. There were problems of opposition L2 and USB, something has
changed?
Thanks.
--
Sartakov A. Vasily
From 1fd038f508ef2fbde17d68f9b06708362e7863f7 Mon Sep 17 00:00:00 2001
From: Ivan Loskutov <[email protected]>
Date: Tue, 27 Nov 2012 18:20:23 +0400
Subject: [PATCH 1/2] [base-foc] Enable L2 cache for OMAP4
---
base-foc/config/panda.kernel | 1 +
base-foc/patches/omap4_l2_cache_enable.patch | 139 ++++++++++++++++++++++++++
2 files changed, 140 insertions(+), 0 deletions(-)
create mode 100644 base-foc/patches/omap4_l2_cache_enable.patch
diff --git a/base-foc/config/panda.kernel b/base-foc/config/panda.kernel
index a7e1a59..ed3ff64 100644
--- a/base-foc/config/panda.kernel
+++ b/base-foc/config/panda.kernel
@@ -30,6 +30,7 @@ CONFIG_ARM_CORTEX_A9=y
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_ARM_TZ is not set
CONFIG_ARM_CA9_ENABLE_SWP=y
+CONFIG_ARM_CACHE_L2CXX0=y
CONFIG_FPU=y
#
diff --git a/base-foc/patches/omap4_l2_cache_enable.patch b/base-foc/patches/omap4_l2_cache_enable.patch
new file mode 100644
index 0000000..1fc3440
--- /dev/null
+++ b/base-foc/patches/omap4_l2_cache_enable.patch
@@ -0,0 +1,139 @@
+diff --git a/kernel/fiasco/src/kern/arm/bsp/omap3/Kconfig b/kernel/fiasco/src/kern/arm/bsp/omap3/Kconfig
+index af74ed8..80e17e6 100644
+--- kernel/fiasco/src/kern/arm/bsp/omap3/Kconfig
++++ kernel/fiasco/src/kern/arm/bsp/omap3/Kconfig
+@@ -31,6 +31,7 @@ config PF_OMAP4_PANDABOARD
+ bool "Pandaboard"
+ depends on PF_OMAP
+ select CAN_ARM_CPU_CORTEX_A9
++ select CAN_ARM_CACHE_L2CXX0
+ help
+ Choose for Pandaboard.
+
+diff --git a/kernel/fiasco/src/kern/arm/bsp/omap3/Modules b/kernel/fiasco/src/kern/arm/bsp/omap3/Modules
+index e320c7c..a2e4861 100644
+--- kernel/fiasco/src/kern/arm/bsp/omap3/Modules
++++ kernel/fiasco/src/kern/arm/bsp/omap3/Modules
+@@ -23,4 +23,5 @@ timer_tick_IMPL += timer_tick-single-vector
+ kernel_uart_IMPL += kernel_uart-arm-omap
+ reset_IMPL += reset-arm-omap
+ clock_IMPL += clock-generic
++outer_cache_IMPL += outer_cache-arm-omap4
+ boot_mp_IMPL += boot_mp-arm-omap4
+diff --git a/kernel/fiasco/src/kern/arm/bsp/omap3/bootstrap-arm-omap.cpp b/kernel/fiasco/src/kern/arm/bsp/omap3/bootstrap-arm-omap.cpp
+index 403f86e..9b46187 100644
+--- kernel/fiasco/src/kern/arm/bsp/omap3/bootstrap-arm-omap.cpp
++++ kernel/fiasco/src/kern/arm/bsp/omap3/bootstrap-arm-omap.cpp
+@@ -18,4 +18,5 @@ map_hw(void *pd)
+ map_1mb(pd, Mem_layout::Devices2_map_base, Mem_layout::Devices2_phys_base, false, false);
+ map_1mb(pd, Mem_layout::Devices3_map_base, Mem_layout::Devices3_phys_base, false, false);
+ map_1mb(pd, Mem_layout::Devices4_map_base, Mem_layout::Devices4_phys_base, false, false);
++ map_1mb(pd, Mem_layout::Devices5_map_base, Mem_layout::Devices5_phys_base, false, false);
+ }
+diff --git a/kernel/fiasco/src/kern/arm/bsp/omap3/mem_layout-arm-omap.cpp b/kernel/fiasco/src/kern/arm/bsp/omap3/mem_layout-arm-omap.cpp
+index 202fc5f..c18fb93 100644
+--- kernel/fiasco/src/kern/arm/bsp/omap3/mem_layout-arm-omap.cpp
++++ kernel/fiasco/src/kern/arm/bsp/omap3/mem_layout-arm-omap.cpp
+@@ -93,6 +93,7 @@ public:
+ Devices2_phys_base = 0x48200000,
+ Devices3_phys_base = 0x4a300000,
+ Devices4_phys_base = 0x49000000,
++ Devices5_phys_base = 0x4a000000,
+ Sdram_phys_base = 0x80000000,
+ };
+
+@@ -101,9 +102,11 @@ public:
+ Devices2_map_base = Registers_map_start + 0x00100000,
+ Devices3_map_base = Registers_map_start + 0x00200000,
+ Devices4_map_base = Registers_map_start + 0x00300000,
++ Devices5_map_base = Registers_map_start + 0x00400000,
+
+ Uart_base = Devices1_map_base + 0x20000,
+ Mp_scu_map_base = Devices2_map_base + 0x40000,
++ L2cxx0_map_base = Devices2_map_base + 0x42000,
+ Gic_cpu_map_base = Devices2_map_base + 0x40100,
+ Gic_dist_map_base = Devices2_map_base + 0x41000,
+
+@@ -111,5 +114,7 @@ public:
+ __PL310 = Devices2_map_base + 0x42000,
+
+ Prm_map_base = Devices3_map_base + 0x6000,
++
++ Scm_map_base = Devices5_map_base + 0x2000,
+ };
+ };
+diff --git a/kernel/fiasco/src/kern/arm/bsp/omap3/outer_cache-arm-omap4.cpp b/kernel/fiasco/src/kern/arm/bsp/omap3/outer_cache-arm-omap4.cpp
+new file mode 100644
+index 0000000..c924bb6
+--- /dev/null
++++ kernel/fiasco/src/kern/arm/bsp/omap3/outer_cache-arm-omap4.cpp
+@@ -0,0 +1,57 @@
++IMPLEMENTATION [arm && omap4 && outer_cache_l2cxx0]:
++
++
++PRIVATE INLINE static
++void
++Outer_cache::smc1(Mword arg0, Mword arg1)
++{
++ register unsigned long r0 asm("r0") = arg1;
++ register unsigned long r12 asm("r12") = arg0;
++
++ asm volatile("dsb; smc #0"
++ : : "r" (r0), "r" (r12)
++ : "r2", "r3", "r4", "r5", "r6",
++ "r7", "r8", "r9", "r10", "r11", "lr", "memory");
++}
++
++IMPLEMENT
++Mword
++Outer_cache::platform_init(Mword aux_control)
++{
++ // check revision
++ Mword idcode = Io::read<Mword>(Mem_layout::Scm_map_base + 0x0204);
++ unsigned hawkeye = (idcode >> 12) & 0xffff;
++ unsigned rev = (idcode >> 28) & 0xf;
++
++ // check omap4430_rev_es1_0
++ bool is_rev_es_1_0 = (hawkeye == 0xb852) && (rev == 0);
++
++ Mword aux_ctrl = ((1 << 16) | // L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT
++ (0x1 << 25) |
++ (0x1 << 26) | // L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT
++ (0x1 << 27)); // L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT
++
++ /*
++ * 16-way associativity, parity disabled
++ * Way size - 32KB (es1.0)
++ * Way size - 64KB (es2.0 +)
++ */
++ if (is_rev_es_1_0)
++ aux_ctrl |= 0x2 << 17; // L2X0_AUX_CTRL_WAY_SIZE_SHIFT
++ else
++ aux_ctrl |= ((0x3 << 17) | // L2X0_AUX_CTRL_WAY_SIZE_SHIFT
++ (0x1 << 22) | // L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT
++ (0x1 << 28) | // L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT
++ (0x1 << 29) | // L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT
++ (0x1 << 30)); // L2X0_AUX_CTRL_EARLY_BRESP_SHIFT
++
++ if (!is_rev_es_1_0)
++ Outer_cache::smc1(0x109, aux_ctrl);
++
++ Outer_cache::smc1(0x102, 0x1);
++
++ aux_control &= 0xc0000fff;
++ aux_control |= aux_ctrl;
++
++ return aux_control;
++}
+diff --git a/kernel/fiasco/src/templates/globalconfig.out.arm-omap4-panda b/kernel/fiasco/src/templates/globalconfig.out.arm-omap4-panda
+index 24de395..2b83b1b 100644
+--- kernel/fiasco/src/templates/globalconfig.out.arm-omap4-panda
++++ kernel/fiasco/src/templates/globalconfig.out.arm-omap4-panda
+@@ -26,6 +26,7 @@ CONFIG_PF_ARM_MP_CAPABLE=y
+ CONFIG_CAN_ARM_CPU_CORTEX_A9=y
+ CONFIG_ARM_CORTEX_A9=y
+ CONFIG_ARM_ALIGNMENT_CHECK=y
++CONFIG_ARM_CACHE_L2CXX0=y
+ # CONFIG_ARM_TZ is not set
+ CONFIG_ARM_CA9_ENABLE_SWP=y
+ CONFIG_FPU=y
--
1.7.8.6
From 26fe28938312bdbfa282ff09fe2e887fa0c80ef7 Mon Sep 17 00:00:00 2001
From: Ivan Loskutov <[email protected]>
Date: Wed, 28 Nov 2012 11:19:39 +0400
Subject: [PATCH 2/2] Add simple l2 cache test
---
os/run/l2cache.run | 58 +++++++++++++++++++++++++++++++++++++++++
os/src/test/l2cache/main.cc | 47 +++++++++++++++++++++++++++++++++
os/src/test/l2cache/target.mk | 3 ++
3 files changed, 108 insertions(+), 0 deletions(-)
create mode 100644 os/run/l2cache.run
create mode 100644 os/src/test/l2cache/main.cc
create mode 100644 os/src/test/l2cache/target.mk
diff --git a/os/run/l2cache.run b/os/run/l2cache.run
new file mode 100644
index 0000000..4c887b5
--- /dev/null
+++ b/os/run/l2cache.run
@@ -0,0 +1,58 @@
+#
+# Build
+#
+set build_components {
+ core init
+ drivers/timer
+ test/l2cache
+}
+
+build $build_components
+
+create_boot_directory
+
+#
+# Generate config
+#
+append config {
+<config>
+ <parent-provides>
+ <service name="ROM"/>
+ <service name="RAM"/>
+ <service name="IRQ"/>
+ <service name="IO_MEM"/>
+ <service name="IO_PORT"/>
+ <service name="CAP"/>
+ <service name="PD"/>
+ <service name="RM"/>
+ <service name="CPU"/>
+ <service name="LOG"/>
+ <service name="SIGNAL"/>
+ </parent-provides>
+ <default-route>
+ <any-service> <parent/> <any-child/> </any-service>
+ </default-route>
+ <start name="timer">
+ <resource name="RAM" quantum="1M"/>
+ <provides><service name="Timer"/></provides>
+ </start>
+
+ <start name="test-l2cache">
+ <resource name="RAM" quantum="40M"/>
+ </start>
+</config>}
+
+install_config $config
+
+#
+# Boot modules
+#
+set boot_modules {
+ core init
+ timer
+ test-l2cache
+}
+
+build_boot_image $boot_modules
+
+run_genode_until forever
diff --git a/os/src/test/l2cache/main.cc b/os/src/test/l2cache/main.cc
new file mode 100644
index 0000000..0d55f19
--- /dev/null
+++ b/os/src/test/l2cache/main.cc
@@ -0,0 +1,47 @@
+#include <base/printf.h>
+#include <timer_session/connection.h>
+
+using namespace Genode;
+
+enum {
+ BUF_S = 16/4*1024,
+ BUF_L = 256/4*1024,
+ N = 1000,
+};
+
+static unsigned buf_s0[BUF_S];
+static unsigned buf_s1[BUF_S];
+
+static unsigned buf_l0[BUF_L];
+static unsigned buf_l1[BUF_L];
+
+void test(unsigned* buf0, unsigned* buf1, unsigned length)
+{
+ for(unsigned i = 0; i != length; ++i)
+ buf0[i] = i;
+
+ for(unsigned i = 0; i != length; ++i)
+ buf1[i] = buf0[i];
+
+ for(unsigned i = 0; i != length; ++i)
+ if (buf0[i] != buf1[i]) PDBG("Error in pos %d", i);
+}
+
+int main(int argc, char* argv[])
+{
+ static Timer::Connection timer;
+
+ unsigned long time0_0 = timer.elapsed_ms();
+ for (unsigned i = 0; i != N; ++i)
+ test(buf_s0, buf_s1, BUF_S);
+ unsigned long time0_1 = timer.elapsed_ms();
+
+ unsigned long time1_0 = timer.elapsed_ms();
+ for (unsigned i = 0; i != N; ++i)
+ test(buf_l0, buf_l1, BUF_L);
+ unsigned long time1_1 = timer.elapsed_ms();
+
+
+ printf("16K time=%li average=%li ns\n", (time0_1 - time0_0), (time0_1 - time0_0)*1000000/N/BUF_S );
+ printf("256K time=%li average=%li ns\n", (time1_1 - time1_0), (time1_1 - time1_0)*1000000/N/BUF_L );
+}
\ No newline at end of file
diff --git a/os/src/test/l2cache/target.mk b/os/src/test/l2cache/target.mk
new file mode 100644
index 0000000..cf9d5fc
--- /dev/null
+++ b/os/src/test/l2cache/target.mk
@@ -0,0 +1,3 @@
+TARGET = test-l2cache
+SRC_CC = main.cc
+LIBS = cxx env
\ No newline at end of file
--
1.7.8.6
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