Hi there, Is there a way to lock L2 cache on Pandaboard ES with running Ubuntu there? TRM says that it is possible, but I don't know it feasible on Pandaboard.
I've tried to compile kernel object and set there bits in Auxiliary Control Register using cp15, but it's RO I suppose, because I cannot write there. CPSR says I am in a Privilige mode, but i guess that's a non-secure Privilige mode? How to use that PL310 cache controller to do that? Do I need to use TrustZone somehow? When compile SMC #1 instruction using asm volatile(...) when compiling natively on Panda, when trying to taskset this Panda is not responding. Cheers,
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