> > The current 40-bit physical memory address space limit of the amd64 arch > is somewhere well into the multi-terabyte range (IDR the exact numbers and > am too lazy to do the math or look it up, but someone else might have them > handy), and the virtual memory isn't limited even to that, as it can use > the full 64-bit address space, so as I said, our arch isn't practically > affected by this limit at the moment. By the time the 40-bit physical > memory constraint is reached, they will have upped that likely to 48 bit, > and it can eventually be upped to 64-bit, ...
For the Opteron, it's 1 TB. More a limit of memory controller than physical address. Beyond that, 40-bits is too limiting. There are two main reasons Intel's Itanium hasn't died on the shelf - FPU performance, and physical memory addressing - 48-bits. There are several systems that have modest processor counts - 64 cpus, but sport 4 TB of physical memory in the hands of real users doing serious work. While AMD lost out on this rather small, unique niche, it is an important one. The third limitation is Hypertransport V1.xx and V2.xx only support a maximum of 32 sockets, and that is only when a rather expensive board design that includes additional logic and an L3 cache to deal with coherency in a NUMA environment. The other issue with Hypertransport is that it's an in-box bus. It was designed for chip-to-chip connect, not a box-to-box. Trying to scale the number of cpus, PCI-X slots, and AGP/PCI-E slots up tends to require multiple boxes - some dedicated to a specific function, which require connecting cables. For certain types of work, a lose network of computers won't work, it neeeds to be a single system - not a cluster. And you don't want to know how much work it takes to get 16 graphics pipes to work together in a reliable, seamless, fashion that can deal with a 4 TB database of textures. For reference - a 2 cpu, 2 graphics pipe, 16 GB workstation is a pretty normal entry level workstation in certain industries. Bob -- - -- [email protected] mailing list
