commit: bc0d79f2cfab2f521dd63b86f9cc0b8077823e50 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> AuthorDate: Wed Aug 16 22:28:16 2017 +0000 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> CommitDate: Wed Aug 16 22:28:16 2017 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=bc0d79f2
Linux patch 4.12.8 0000_README | 4 + 1007_linux-4.12.8.patch | 2849 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 2853 insertions(+) diff --git a/0000_README b/0000_README index 3a1bafb..47efe0d 100644 --- a/0000_README +++ b/0000_README @@ -71,6 +71,10 @@ Patch: 1006_linux-4.12.7.patch From: http://www.kernel.org Desc: Linux 4.12.7 +Patch: 1007_linux-4.12.8.patch +From: http://www.kernel.org +Desc: Linux 4.12.8 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1007_linux-4.12.8.patch b/1007_linux-4.12.8.patch new file mode 100644 index 0000000..560efc0 --- /dev/null +++ b/1007_linux-4.12.8.patch @@ -0,0 +1,2849 @@ +diff --git a/Makefile b/Makefile +index ebe69a704bca..6da481d08441 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,6 +1,6 @@ + VERSION = 4 + PATCHLEVEL = 12 +-SUBLEVEL = 7 ++SUBLEVEL = 8 + EXTRAVERSION = + NAME = Fearless Coyote + +diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S +index 1910223a9c02..cea2bb1621e6 100644 +--- a/arch/mips/dec/int-handler.S ++++ b/arch/mips/dec/int-handler.S +@@ -147,23 +147,12 @@ + * Find irq with highest priority + */ + # open coded PTR_LA t1, cpu_mask_nr_tbl +-#if (_MIPS_SZPTR == 32) ++#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) + # open coded la t1, cpu_mask_nr_tbl + lui t1, %hi(cpu_mask_nr_tbl) + addiu t1, %lo(cpu_mask_nr_tbl) +- +-#endif +-#if (_MIPS_SZPTR == 64) +- # open coded dla t1, cpu_mask_nr_tbl +- .set push +- .set noat +- lui t1, %highest(cpu_mask_nr_tbl) +- lui AT, %hi(cpu_mask_nr_tbl) +- daddiu t1, t1, %higher(cpu_mask_nr_tbl) +- daddiu AT, AT, %lo(cpu_mask_nr_tbl) +- dsll t1, 32 +- daddu t1, t1, AT +- .set pop ++#else ++#error GCC `-msym32' option required for 64-bit DECstation builds + #endif + 1: lw t2,(t1) + nop +@@ -214,23 +203,12 @@ + * Find irq with highest priority + */ + # open coded PTR_LA t1,asic_mask_nr_tbl +-#if (_MIPS_SZPTR == 32) ++#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) + # open coded la t1, asic_mask_nr_tbl + lui t1, %hi(asic_mask_nr_tbl) + addiu t1, %lo(asic_mask_nr_tbl) +- +-#endif +-#if (_MIPS_SZPTR == 64) +- # open coded dla t1, asic_mask_nr_tbl +- .set push +- .set noat +- lui t1, %highest(asic_mask_nr_tbl) +- lui AT, %hi(asic_mask_nr_tbl) +- daddiu t1, t1, %higher(asic_mask_nr_tbl) +- daddiu AT, AT, %lo(asic_mask_nr_tbl) +- dsll t1, 32 +- daddu t1, t1, AT +- .set pop ++#else ++#error GCC `-msym32' option required for 64-bit DECstation builds + #endif + 2: lw t2,(t1) + nop +diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h +index fc67947ed658..8b14c2706aa5 100644 +--- a/arch/mips/include/asm/cache.h ++++ b/arch/mips/include/asm/cache.h +@@ -9,6 +9,8 @@ + #ifndef _ASM_CACHE_H + #define _ASM_CACHE_H + ++#include <kmalloc.h> ++ + #define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT + #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) + +diff --git a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h +index d045973ddb33..3ea84acf1814 100644 +--- a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h ++++ b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h +@@ -33,6 +33,10 @@ + #define CVMX_L2C_DBG (CVMX_ADD_IO_SEG(0x0001180080000030ull)) + #define CVMX_L2C_CFG (CVMX_ADD_IO_SEG(0x0001180080000000ull)) + #define CVMX_L2C_CTL (CVMX_ADD_IO_SEG(0x0001180080800000ull)) ++#define CVMX_L2C_ERR_TDTX(block_id) \ ++ (CVMX_ADD_IO_SEG(0x0001180080A007E0ull) + ((block_id) & 3) * 0x40000ull) ++#define CVMX_L2C_ERR_TTGX(block_id) \ ++ (CVMX_ADD_IO_SEG(0x0001180080A007E8ull) + ((block_id) & 3) * 0x40000ull) + #define CVMX_L2C_LCKBASE (CVMX_ADD_IO_SEG(0x0001180080000058ull)) + #define CVMX_L2C_LCKOFF (CVMX_ADD_IO_SEG(0x0001180080000060ull)) + #define CVMX_L2C_PFCTL (CVMX_ADD_IO_SEG(0x0001180080000090ull)) +@@ -66,9 +70,40 @@ + ((offset) & 1) * 8) + #define CVMX_L2C_WPAR_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080840000ull) + \ + ((offset) & 31) * 8) +-#define CVMX_L2D_FUS3 (CVMX_ADD_IO_SEG(0x00011800800007B8ull)) + + ++union cvmx_l2c_err_tdtx { ++ uint64_t u64; ++ struct cvmx_l2c_err_tdtx_s { ++ __BITFIELD_FIELD(uint64_t dbe:1, ++ __BITFIELD_FIELD(uint64_t sbe:1, ++ __BITFIELD_FIELD(uint64_t vdbe:1, ++ __BITFIELD_FIELD(uint64_t vsbe:1, ++ __BITFIELD_FIELD(uint64_t syn:10, ++ __BITFIELD_FIELD(uint64_t reserved_22_49:28, ++ __BITFIELD_FIELD(uint64_t wayidx:18, ++ __BITFIELD_FIELD(uint64_t reserved_2_3:2, ++ __BITFIELD_FIELD(uint64_t type:2, ++ ;))))))))) ++ } s; ++}; ++ ++union cvmx_l2c_err_ttgx { ++ uint64_t u64; ++ struct cvmx_l2c_err_ttgx_s { ++ __BITFIELD_FIELD(uint64_t dbe:1, ++ __BITFIELD_FIELD(uint64_t sbe:1, ++ __BITFIELD_FIELD(uint64_t noway:1, ++ __BITFIELD_FIELD(uint64_t reserved_56_60:5, ++ __BITFIELD_FIELD(uint64_t syn:6, ++ __BITFIELD_FIELD(uint64_t reserved_22_49:28, ++ __BITFIELD_FIELD(uint64_t wayidx:15, ++ __BITFIELD_FIELD(uint64_t reserved_2_6:5, ++ __BITFIELD_FIELD(uint64_t type:2, ++ ;))))))))) ++ } s; ++}; ++ + union cvmx_l2c_cfg { + uint64_t u64; + struct cvmx_l2c_cfg_s { +diff --git a/arch/mips/include/asm/octeon/cvmx-l2d-defs.h b/arch/mips/include/asm/octeon/cvmx-l2d-defs.h +new file mode 100644 +index 000000000000..a951ad5d65ad +--- /dev/null ++++ b/arch/mips/include/asm/octeon/cvmx-l2d-defs.h +@@ -0,0 +1,60 @@ ++/***********************license start*************** ++ * Author: Cavium Networks ++ * ++ * Contact: supp...@caviumnetworks.com ++ * This file is part of the OCTEON SDK ++ * ++ * Copyright (c) 2003-2017 Cavium, Inc. ++ * ++ * This file is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License, Version 2, as ++ * published by the Free Software Foundation. ++ * ++ * This file is distributed in the hope that it will be useful, but ++ * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty ++ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or ++ * NONINFRINGEMENT. See the GNU General Public License for more ++ * details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this file; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ * or visit http://www.gnu.org/licenses/. ++ * ++ * This file may also be available under a different license from Cavium. ++ * Contact Cavium Networks for more information ++ ***********************license end**************************************/ ++ ++#ifndef __CVMX_L2D_DEFS_H__ ++#define __CVMX_L2D_DEFS_H__ ++ ++#define CVMX_L2D_ERR (CVMX_ADD_IO_SEG(0x0001180080000010ull)) ++#define CVMX_L2D_FUS3 (CVMX_ADD_IO_SEG(0x00011800800007B8ull)) ++ ++ ++union cvmx_l2d_err { ++ uint64_t u64; ++ struct cvmx_l2d_err_s { ++ __BITFIELD_FIELD(uint64_t reserved_6_63:58, ++ __BITFIELD_FIELD(uint64_t bmhclsel:1, ++ __BITFIELD_FIELD(uint64_t ded_err:1, ++ __BITFIELD_FIELD(uint64_t sec_err:1, ++ __BITFIELD_FIELD(uint64_t ded_intena:1, ++ __BITFIELD_FIELD(uint64_t sec_intena:1, ++ __BITFIELD_FIELD(uint64_t ecc_ena:1, ++ ;))))))) ++ } s; ++}; ++ ++union cvmx_l2d_fus3 { ++ uint64_t u64; ++ struct cvmx_l2d_fus3_s { ++ __BITFIELD_FIELD(uint64_t reserved_40_63:24, ++ __BITFIELD_FIELD(uint64_t ema_ctl:3, ++ __BITFIELD_FIELD(uint64_t reserved_34_36:3, ++ __BITFIELD_FIELD(uint64_t q3fus:34, ++ ;)))) ++ } s; ++}; ++ ++#endif +diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h +index 9742202f2a32..e638735cc3ac 100644 +--- a/arch/mips/include/asm/octeon/cvmx.h ++++ b/arch/mips/include/asm/octeon/cvmx.h +@@ -62,6 +62,7 @@ enum cvmx_mips_space { + #include <asm/octeon/cvmx-iob-defs.h> + #include <asm/octeon/cvmx-ipd-defs.h> + #include <asm/octeon/cvmx-l2c-defs.h> ++#include <asm/octeon/cvmx-l2d-defs.h> + #include <asm/octeon/cvmx-l2t-defs.h> + #include <asm/octeon/cvmx-led-defs.h> + #include <asm/octeon/cvmx-mio-defs.h> +diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c +index 857129acf960..94a948207cd2 100644 +--- a/arch/powerpc/kernel/setup-common.c ++++ b/arch/powerpc/kernel/setup-common.c +@@ -335,6 +335,10 @@ static int show_cpuinfo(struct seq_file *m, void *v) + maj = ((pvr >> 8) & 0xFF) - 1; + min = pvr & 0xFF; + break; ++ case 0x004e: /* POWER9 bits 12-15 give chip type */ ++ maj = (pvr >> 8) & 0x0F; ++ min = pvr & 0xFF; ++ break; + default: + maj = (pvr >> 8) & 0xFF; + min = pvr & 0xFF; +diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c +index d159e9b9c018..672391003e40 100644 +--- a/arch/xtensa/kernel/xtensa_ksyms.c ++++ b/arch/xtensa/kernel/xtensa_ksyms.c +@@ -94,13 +94,11 @@ unsigned long __sync_fetch_and_or_4(unsigned long *p, unsigned long v) + } + EXPORT_SYMBOL(__sync_fetch_and_or_4); + +-#ifdef CONFIG_NET + /* + * Networking support + */ + EXPORT_SYMBOL(csum_partial); + EXPORT_SYMBOL(csum_partial_copy_generic); +-#endif /* CONFIG_NET */ + + /* + * Architecture-specific symbols +diff --git a/arch/xtensa/mm/cache.c b/arch/xtensa/mm/cache.c +index 1a804a2f9a5b..3c75c4e597da 100644 +--- a/arch/xtensa/mm/cache.c ++++ b/arch/xtensa/mm/cache.c +@@ -103,6 +103,7 @@ void clear_user_highpage(struct page *page, unsigned long vaddr) + clear_page_alias(kvaddr, paddr); + preempt_enable(); + } ++EXPORT_SYMBOL(clear_user_highpage); + + void copy_user_highpage(struct page *dst, struct page *src, + unsigned long vaddr, struct vm_area_struct *vma) +@@ -119,10 +120,7 @@ void copy_user_highpage(struct page *dst, struct page *src, + copy_page_alias(dst_vaddr, src_vaddr, dst_paddr, src_paddr); + preempt_enable(); + } +- +-#endif /* DCACHE_WAY_SIZE > PAGE_SIZE */ +- +-#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK ++EXPORT_SYMBOL(copy_user_highpage); + + /* + * Any time the kernel writes to a user page cache page, or it is about to +@@ -176,7 +174,7 @@ void flush_dcache_page(struct page *page) + + /* There shouldn't be an entry in the cache for this page anymore. */ + } +- ++EXPORT_SYMBOL(flush_dcache_page); + + /* + * For now, flush the whole cache. FIXME?? +@@ -188,6 +186,7 @@ void local_flush_cache_range(struct vm_area_struct *vma, + __flush_invalidate_dcache_all(); + __invalidate_icache_all(); + } ++EXPORT_SYMBOL(local_flush_cache_range); + + /* + * Remove any entry in the cache for this page. +@@ -207,8 +206,9 @@ void local_flush_cache_page(struct vm_area_struct *vma, unsigned long address, + __flush_invalidate_dcache_page_alias(virt, phys); + __invalidate_icache_page_alias(virt, phys); + } ++EXPORT_SYMBOL(local_flush_cache_page); + +-#endif ++#endif /* DCACHE_WAY_SIZE > PAGE_SIZE */ + + void + update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep) +@@ -225,7 +225,7 @@ update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep) + + flush_tlb_page(vma, addr); + +-#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK ++#if (DCACHE_WAY_SIZE > PAGE_SIZE) + + if (!PageReserved(page) && test_bit(PG_arch_1, &page->flags)) { + unsigned long phys = page_to_phys(page); +@@ -256,7 +256,7 @@ update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep) + * flush_dcache_page() on the page. + */ + +-#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK ++#if (DCACHE_WAY_SIZE > PAGE_SIZE) + + void copy_to_user_page(struct vm_area_struct *vma, struct page *page, + unsigned long vaddr, void *dst, const void *src, +diff --git a/block/blk-mq.c b/block/blk-mq.c +index 7353e0080062..2414e0cd3a02 100644 +--- a/block/blk-mq.c ++++ b/block/blk-mq.c +@@ -620,8 +620,8 @@ EXPORT_SYMBOL(blk_mq_kick_requeue_list); + void blk_mq_delay_kick_requeue_list(struct request_queue *q, + unsigned long msecs) + { +- kblockd_schedule_delayed_work(&q->requeue_work, +- msecs_to_jiffies(msecs)); ++ kblockd_mod_delayed_work_on(WORK_CPU_UNBOUND, &q->requeue_work, ++ msecs_to_jiffies(msecs)); + } + EXPORT_SYMBOL(blk_mq_delay_kick_requeue_list); + +diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c +index ac350c518e0c..31c0586d9b13 100644 +--- a/drivers/base/firmware_class.c ++++ b/drivers/base/firmware_class.c +@@ -30,7 +30,6 @@ + #include <linux/syscore_ops.h> + #include <linux/reboot.h> + #include <linux/security.h> +-#include <linux/swait.h> + + #include <generated/utsrelease.h> + +@@ -112,13 +111,13 @@ static inline long firmware_loading_timeout(void) + * state of the firmware loading. + */ + struct fw_state { +- struct swait_queue_head wq; ++ struct completion completion; + enum fw_status status; + }; + + static void fw_state_init(struct fw_state *fw_st) + { +- init_swait_queue_head(&fw_st->wq); ++ init_completion(&fw_st->completion); + fw_st->status = FW_STATUS_UNKNOWN; + } + +@@ -131,9 +130,7 @@ static int __fw_state_wait_common(struct fw_state *fw_st, long timeout) + { + long ret; + +- ret = swait_event_interruptible_timeout(fw_st->wq, +- __fw_state_is_done(READ_ONCE(fw_st->status)), +- timeout); ++ ret = wait_for_completion_killable_timeout(&fw_st->completion, timeout); + if (ret != 0 && fw_st->status == FW_STATUS_ABORTED) + return -ENOENT; + if (!ret) +@@ -148,35 +145,34 @@ static void __fw_state_set(struct fw_state *fw_st, + WRITE_ONCE(fw_st->status, status); + + if (status == FW_STATUS_DONE || status == FW_STATUS_ABORTED) +- swake_up(&fw_st->wq); ++ complete_all(&fw_st->completion); + } + + #define fw_state_start(fw_st) \ + __fw_state_set(fw_st, FW_STATUS_LOADING) + #define fw_state_done(fw_st) \ + __fw_state_set(fw_st, FW_STATUS_DONE) ++#define fw_state_aborted(fw_st) \ ++ __fw_state_set(fw_st, FW_STATUS_ABORTED) + #define fw_state_wait(fw_st) \ + __fw_state_wait_common(fw_st, MAX_SCHEDULE_TIMEOUT) + +-#ifndef CONFIG_FW_LOADER_USER_HELPER +- +-#define fw_state_is_aborted(fw_st) false +- +-#else /* CONFIG_FW_LOADER_USER_HELPER */ +- + static int __fw_state_check(struct fw_state *fw_st, enum fw_status status) + { + return fw_st->status == status; + } + ++#define fw_state_is_aborted(fw_st) \ ++ __fw_state_check(fw_st, FW_STATUS_ABORTED) ++ ++#ifdef CONFIG_FW_LOADER_USER_HELPER ++ + #define fw_state_aborted(fw_st) \ + __fw_state_set(fw_st, FW_STATUS_ABORTED) + #define fw_state_is_done(fw_st) \ + __fw_state_check(fw_st, FW_STATUS_DONE) + #define fw_state_is_loading(fw_st) \ + __fw_state_check(fw_st, FW_STATUS_LOADING) +-#define fw_state_is_aborted(fw_st) \ +- __fw_state_check(fw_st, FW_STATUS_ABORTED) + #define fw_state_wait_timeout(fw_st, timeout) \ + __fw_state_wait_common(fw_st, timeout) + +@@ -1163,6 +1159,28 @@ static int assign_firmware_buf(struct firmware *fw, struct device *device, + return 0; + } + ++/* ++ * Batched requests need only one wake, we need to do this step last due to the ++ * fallback mechanism. The buf is protected with kref_get(), and it won't be ++ * released until the last user calls release_firmware(). ++ * ++ * Failed batched requests are possible as well, in such cases we just share ++ * the struct firmware_buf and won't release it until all requests are woken ++ * and have gone through this same path. ++ */ ++static void fw_abort_batch_reqs(struct firmware *fw) ++{ ++ struct firmware_buf *buf; ++ ++ /* Loaded directly? */ ++ if (!fw || !fw->priv) ++ return; ++ ++ buf = fw->priv; ++ if (!fw_state_is_aborted(&buf->fw_st)) ++ fw_state_aborted(&buf->fw_st); ++} ++ + /* called from request_firmware() and request_firmware_work_func() */ + static int + _request_firmware(const struct firmware **firmware_p, const char *name, +@@ -1224,6 +1242,7 @@ _request_firmware(const struct firmware **firmware_p, const char *name, + + out: + if (ret < 0) { ++ fw_abort_batch_reqs(fw); + release_firmware(fw); + fw = NULL; + } +diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c +index 5c26488e7a2d..0529e500c534 100644 +--- a/drivers/gpu/drm/bridge/tc358767.c ++++ b/drivers/gpu/drm/bridge/tc358767.c +@@ -1255,7 +1255,7 @@ static int tc_probe(struct i2c_client *client, const struct i2c_device_id *id) + + /* port@2 is the output port */ + ret = drm_of_find_panel_or_bridge(dev->of_node, 2, 0, &tc->panel, NULL); +- if (ret) ++ if (ret && ret != -ENODEV) + return ret; + + /* Shut down GPIO is optional */ +diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c +index 1013765274da..0ceed22187df 100644 +--- a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c ++++ b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c +@@ -270,8 +270,8 @@ static int submit_reloc(struct etnaviv_gem_submit *submit, void *stream, + if (ret) + return ret; + +- if (r->reloc_offset >= bo->obj->base.size - sizeof(*ptr)) { +- DRM_ERROR("relocation %u outside object", i); ++ if (r->reloc_offset > bo->obj->base.size - sizeof(*ptr)) { ++ DRM_ERROR("relocation %u outside object\n", i); + return -EINVAL; + } + +diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c +index 306c6b06b330..17c4ae7e4e7c 100644 +--- a/drivers/gpu/drm/i915/intel_color.c ++++ b/drivers/gpu/drm/i915/intel_color.c +@@ -398,6 +398,7 @@ static void bdw_load_gamma_lut(struct drm_crtc_state *state, u32 offset) + } + + /* Program the max register to clamp values > 1.0. */ ++ i = lut_size - 1; + I915_WRITE(PREC_PAL_GC_MAX(pipe, 0), + drm_color_lut_extract(lut[i].red, 16)); + I915_WRITE(PREC_PAL_GC_MAX(pipe, 1), +diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c +index d1263b82d646..0703da1d946a 100644 +--- a/drivers/i2c/busses/i2c-designware-platdrv.c ++++ b/drivers/i2c/busses/i2c-designware-platdrv.c +@@ -254,6 +254,9 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) + } + + acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev); ++ /* Some broken DSTDs use 1MiHz instead of 1MHz */ ++ if (acpi_speed == 1048576) ++ acpi_speed = 1000000; + /* + * Find bus speed from the "clock-frequency" device property, ACPI + * or by using fast mode if neither is set. +diff --git a/drivers/iio/accel/bmc150-accel-core.c b/drivers/iio/accel/bmc150-accel-core.c +index 6b5d3be283c4..807299dd45eb 100644 +--- a/drivers/iio/accel/bmc150-accel-core.c ++++ b/drivers/iio/accel/bmc150-accel-core.c +@@ -193,7 +193,6 @@ struct bmc150_accel_data { + struct regmap *regmap; + int irq; + struct bmc150_accel_interrupt interrupts[BMC150_ACCEL_INTERRUPTS]; +- atomic_t active_intr; + struct bmc150_accel_trigger triggers[BMC150_ACCEL_TRIGGERS]; + struct mutex mutex; + u8 fifo_mode, watermark; +@@ -493,11 +492,6 @@ static int bmc150_accel_set_interrupt(struct bmc150_accel_data *data, int i, + goto out_fix_power_state; + } + +- if (state) +- atomic_inc(&data->active_intr); +- else +- atomic_dec(&data->active_intr); +- + return 0; + + out_fix_power_state: +@@ -1710,8 +1704,7 @@ static int bmc150_accel_resume(struct device *dev) + struct bmc150_accel_data *data = iio_priv(indio_dev); + + mutex_lock(&data->mutex); +- if (atomic_read(&data->active_intr)) +- bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0); ++ bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0); + bmc150_accel_fifo_set_mode(data); + mutex_unlock(&data->mutex); + +diff --git a/drivers/iio/accel/st_accel_core.c b/drivers/iio/accel/st_accel_core.c +index 784670e2736b..2ee3ae11eb2a 100644 +--- a/drivers/iio/accel/st_accel_core.c ++++ b/drivers/iio/accel/st_accel_core.c +@@ -166,6 +166,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = { + .mask_ihl = 0x02, + .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, + }, ++ .sim = { ++ .addr = 0x23, ++ .value = BIT(0), ++ }, + .multi_read_bit = true, + .bootime = 2, + }, +@@ -234,6 +238,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = { + .mask_od = 0x40, + .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, + }, ++ .sim = { ++ .addr = 0x23, ++ .value = BIT(0), ++ }, + .multi_read_bit = true, + .bootime = 2, + }, +@@ -316,6 +324,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = { + .en_mask = 0x08, + }, + }, ++ .sim = { ++ .addr = 0x24, ++ .value = BIT(0), ++ }, + .multi_read_bit = false, + .bootime = 2, + }, +@@ -379,6 +391,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = { + .mask_int1 = 0x04, + .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, + }, ++ .sim = { ++ .addr = 0x21, ++ .value = BIT(1), ++ }, + .multi_read_bit = true, + .bootime = 2, /* guess */ + }, +@@ -437,6 +453,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = { + .mask_od = 0x40, + .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, + }, ++ .sim = { ++ .addr = 0x21, ++ .value = BIT(7), ++ }, + .multi_read_bit = false, + .bootime = 2, /* guess */ + }, +@@ -499,6 +519,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = { + .addr_ihl = 0x22, + .mask_ihl = 0x80, + }, ++ .sim = { ++ .addr = 0x23, ++ .value = BIT(0), ++ }, + .multi_read_bit = true, + .bootime = 2, + }, +@@ -547,6 +571,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = { + .mask_int1 = 0x04, + .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, + }, ++ .sim = { ++ .addr = 0x21, ++ .value = BIT(1), ++ }, + .multi_read_bit = false, + .bootime = 2, + }, +@@ -614,6 +642,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = { + .mask_ihl = 0x02, + .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, + }, ++ .sim = { ++ .addr = 0x23, ++ .value = BIT(0), ++ }, + .multi_read_bit = true, + .bootime = 2, + }, +diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c +index 62670cbfa2bb..87fd6e0ce5ee 100644 +--- a/drivers/iio/adc/aspeed_adc.c ++++ b/drivers/iio/adc/aspeed_adc.c +@@ -22,6 +22,7 @@ + + #include <linux/iio/iio.h> + #include <linux/iio/driver.h> ++#include <linux/iopoll.h> + + #define ASPEED_RESOLUTION_BITS 10 + #define ASPEED_CLOCKS_PER_SAMPLE 12 +@@ -38,11 +39,17 @@ + + #define ASPEED_ENGINE_ENABLE BIT(0) + ++#define ASPEED_ADC_CTRL_INIT_RDY BIT(8) ++ ++#define ASPEED_ADC_INIT_POLLING_TIME 500 ++#define ASPEED_ADC_INIT_TIMEOUT 500000 ++ + struct aspeed_adc_model_data { + const char *model_name; + unsigned int min_sampling_rate; // Hz + unsigned int max_sampling_rate; // Hz + unsigned int vref_voltage; // mV ++ bool wait_init_sequence; + }; + + struct aspeed_adc_data { +@@ -211,6 +218,24 @@ static int aspeed_adc_probe(struct platform_device *pdev) + goto scaler_error; + } + ++ model_data = of_device_get_match_data(&pdev->dev); ++ ++ if (model_data->wait_init_sequence) { ++ /* Enable engine in normal mode. */ ++ writel(ASPEED_OPERATION_MODE_NORMAL | ASPEED_ENGINE_ENABLE, ++ data->base + ASPEED_REG_ENGINE_CONTROL); ++ ++ /* Wait for initial sequence complete. */ ++ ret = readl_poll_timeout(data->base + ASPEED_REG_ENGINE_CONTROL, ++ adc_engine_control_reg_val, ++ adc_engine_control_reg_val & ++ ASPEED_ADC_CTRL_INIT_RDY, ++ ASPEED_ADC_INIT_POLLING_TIME, ++ ASPEED_ADC_INIT_TIMEOUT); ++ if (ret) ++ goto scaler_error; ++ } ++ + /* Start all channels in normal mode. */ + clk_prepare_enable(data->clk_scaler->clk); + adc_engine_control_reg_val = GENMASK(31, 16) | +@@ -270,6 +295,7 @@ static const struct aspeed_adc_model_data ast2500_model_data = { + .vref_voltage = 1800, // mV + .min_sampling_rate = 1, + .max_sampling_rate = 1000000, ++ .wait_init_sequence = true, + }; + + static const struct of_device_id aspeed_adc_matches[] = { +diff --git a/drivers/iio/adc/axp288_adc.c b/drivers/iio/adc/axp288_adc.c +index 64799ad7ebad..7fd24949c0c1 100644 +--- a/drivers/iio/adc/axp288_adc.c ++++ b/drivers/iio/adc/axp288_adc.c +@@ -28,6 +28,8 @@ + #include <linux/iio/driver.h> + + #define AXP288_ADC_EN_MASK 0xF1 ++#define AXP288_ADC_TS_PIN_GPADC 0xF2 ++#define AXP288_ADC_TS_PIN_ON 0xF3 + + enum axp288_adc_id { + AXP288_ADC_TS, +@@ -121,6 +123,16 @@ static int axp288_adc_read_channel(int *val, unsigned long address, + return IIO_VAL_INT; + } + ++static int axp288_adc_set_ts(struct regmap *regmap, unsigned int mode, ++ unsigned long address) ++{ ++ /* channels other than GPADC do not need to switch TS pin */ ++ if (address != AXP288_GP_ADC_H) ++ return 0; ++ ++ return regmap_write(regmap, AXP288_ADC_TS_PIN_CTRL, mode); ++} ++ + static int axp288_adc_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +@@ -131,7 +143,16 @@ static int axp288_adc_read_raw(struct iio_dev *indio_dev, + mutex_lock(&indio_dev->mlock); + switch (mask) { + case IIO_CHAN_INFO_RAW: ++ if (axp288_adc_set_ts(info->regmap, AXP288_ADC_TS_PIN_GPADC, ++ chan->address)) { ++ dev_err(&indio_dev->dev, "GPADC mode\n"); ++ ret = -EINVAL; ++ break; ++ } + ret = axp288_adc_read_channel(val, chan->address, info->regmap); ++ if (axp288_adc_set_ts(info->regmap, AXP288_ADC_TS_PIN_ON, ++ chan->address)) ++ dev_err(&indio_dev->dev, "TS pin restore\n"); + break; + default: + ret = -EINVAL; +@@ -141,6 +162,15 @@ static int axp288_adc_read_raw(struct iio_dev *indio_dev, + return ret; + } + ++static int axp288_adc_set_state(struct regmap *regmap) ++{ ++ /* ADC should be always enabled for internal FG to function */ ++ if (regmap_write(regmap, AXP288_ADC_TS_PIN_CTRL, AXP288_ADC_TS_PIN_ON)) ++ return -EIO; ++ ++ return regmap_write(regmap, AXP20X_ADC_EN1, AXP288_ADC_EN_MASK); ++} ++ + static const struct iio_info axp288_adc_iio_info = { + .read_raw = &axp288_adc_read_raw, + .driver_module = THIS_MODULE, +@@ -169,7 +199,7 @@ static int axp288_adc_probe(struct platform_device *pdev) + * Set ADC to enabled state at all time, including system suspend. + * otherwise internal fuel gauge functionality may be affected. + */ +- ret = regmap_write(info->regmap, AXP20X_ADC_EN1, AXP288_ADC_EN_MASK); ++ ret = axp288_adc_set_state(axp20x->regmap); + if (ret) { + dev_err(&pdev->dev, "unable to enable ADC device\n"); + return ret; +diff --git a/drivers/iio/adc/vf610_adc.c b/drivers/iio/adc/vf610_adc.c +index 01fc76f7d660..c168e0db329a 100644 +--- a/drivers/iio/adc/vf610_adc.c ++++ b/drivers/iio/adc/vf610_adc.c +@@ -77,7 +77,7 @@ + #define VF610_ADC_ADSTS_MASK 0x300 + #define VF610_ADC_ADLPC_EN 0x80 + #define VF610_ADC_ADHSC_EN 0x400 +-#define VF610_ADC_REFSEL_VALT 0x100 ++#define VF610_ADC_REFSEL_VALT 0x800 + #define VF610_ADC_REFSEL_VBG 0x1000 + #define VF610_ADC_ADTRG_HARD 0x2000 + #define VF610_ADC_AVGS_8 0x4000 +diff --git a/drivers/iio/common/st_sensors/st_sensors_core.c b/drivers/iio/common/st_sensors/st_sensors_core.c +index 79c8c7cd70d5..6e6a1ecc99dd 100644 +--- a/drivers/iio/common/st_sensors/st_sensors_core.c ++++ b/drivers/iio/common/st_sensors/st_sensors_core.c +@@ -550,6 +550,31 @@ int st_sensors_read_info_raw(struct iio_dev *indio_dev, + } + EXPORT_SYMBOL(st_sensors_read_info_raw); + ++static int st_sensors_init_interface_mode(struct iio_dev *indio_dev, ++ const struct st_sensor_settings *sensor_settings) ++{ ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ struct device_node *np = sdata->dev->of_node; ++ struct st_sensors_platform_data *pdata; ++ ++ pdata = (struct st_sensors_platform_data *)sdata->dev->platform_data; ++ if (((np && of_property_read_bool(np, "spi-3wire")) || ++ (pdata && pdata->spi_3wire)) && sensor_settings->sim.addr) { ++ int err; ++ ++ err = sdata->tf->write_byte(&sdata->tb, sdata->dev, ++ sensor_settings->sim.addr, ++ sensor_settings->sim.value); ++ if (err < 0) { ++ dev_err(&indio_dev->dev, ++ "failed to init interface mode\n"); ++ return err; ++ } ++ } ++ ++ return 0; ++} ++ + int st_sensors_check_device_support(struct iio_dev *indio_dev, + int num_sensors_list, + const struct st_sensor_settings *sensor_settings) +@@ -574,6 +599,10 @@ int st_sensors_check_device_support(struct iio_dev *indio_dev, + return -ENODEV; + } + ++ err = st_sensors_init_interface_mode(indio_dev, &sensor_settings[i]); ++ if (err < 0) ++ return err; ++ + if (sensor_settings[i].wai_addr) { + err = sdata->tf->read_byte(&sdata->tb, sdata->dev, + sensor_settings[i].wai_addr, &wai); +diff --git a/drivers/iio/light/tsl2563.c b/drivers/iio/light/tsl2563.c +index e7d4ea75e007..7599693f7fe9 100644 +--- a/drivers/iio/light/tsl2563.c ++++ b/drivers/iio/light/tsl2563.c +@@ -626,7 +626,7 @@ static irqreturn_t tsl2563_event_handler(int irq, void *private) + struct tsl2563_chip *chip = iio_priv(dev_info); + + iio_push_event(dev_info, +- IIO_UNMOD_EVENT_CODE(IIO_LIGHT, ++ IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, + 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_EITHER), +diff --git a/drivers/iio/pressure/st_pressure_core.c b/drivers/iio/pressure/st_pressure_core.c +index fd0edca0e656..99448012b47f 100644 +--- a/drivers/iio/pressure/st_pressure_core.c ++++ b/drivers/iio/pressure/st_pressure_core.c +@@ -456,7 +456,7 @@ static const struct st_sensor_settings st_press_sensors_settings[] = { + .mask_od = 0x40, + .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, + }, +- .multi_read_bit = true, ++ .multi_read_bit = false, + .bootime = 2, + }, + }; +diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c +index 2c87dede5841..f451094acb8d 100644 +--- a/drivers/mmc/core/mmc.c ++++ b/drivers/mmc/core/mmc.c +@@ -1288,7 +1288,7 @@ int mmc_hs400_to_hs200(struct mmc_card *card) + static int mmc_select_hs400es(struct mmc_card *card) + { + struct mmc_host *host = card->host; +- int err = 0; ++ int err = -EINVAL; + u8 val; + + if (!(host->caps & MMC_CAP_8_BIT_DATA)) { +diff --git a/drivers/mtd/nand/atmel/pmecc.c b/drivers/mtd/nand/atmel/pmecc.c +index 55a8ee5306ea..8c210a5776bc 100644 +--- a/drivers/mtd/nand/atmel/pmecc.c ++++ b/drivers/mtd/nand/atmel/pmecc.c +@@ -945,6 +945,7 @@ struct atmel_pmecc *devm_atmel_pmecc_get(struct device *userdev) + */ + struct platform_device *pdev = to_platform_device(userdev); + const struct atmel_pmecc_caps *caps; ++ const struct of_device_id *match; + + /* No PMECC engine available. */ + if (!of_property_read_bool(userdev->of_node, +@@ -953,21 +954,11 @@ struct atmel_pmecc *devm_atmel_pmecc_get(struct device *userdev) + + caps = &at91sam9g45_caps; + +- /* +- * Try to find the NFC subnode and extract the associated caps +- * from there. +- */ +- np = of_find_compatible_node(userdev->of_node, NULL, +- "atmel,sama5d3-nfc"); +- if (np) { +- const struct of_device_id *match; +- +- match = of_match_node(atmel_pmecc_legacy_match, np); +- if (match && match->data) +- caps = match->data; +- +- of_node_put(np); +- } ++ /* Find the caps associated to the NAND dev node. */ ++ match = of_match_node(atmel_pmecc_legacy_match, ++ userdev->of_node); ++ if (match && match->data) ++ caps = match->data; + + pmecc = atmel_pmecc_create(pdev, caps, 1, 2); + } +diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c +index b1dd12729f19..6f9771e82476 100644 +--- a/drivers/mtd/nand/nand_base.c ++++ b/drivers/mtd/nand/nand_base.c +@@ -65,8 +65,14 @@ static int nand_ooblayout_ecc_sp(struct mtd_info *mtd, int section, + + if (!section) { + oobregion->offset = 0; +- oobregion->length = 4; ++ if (mtd->oobsize == 16) ++ oobregion->length = 4; ++ else ++ oobregion->length = 3; + } else { ++ if (mtd->oobsize == 8) ++ return -ERANGE; ++ + oobregion->offset = 6; + oobregion->length = ecc->total - 4; + } +@@ -1102,7 +1108,9 @@ static int nand_setup_data_interface(struct nand_chip *chip) + * Ensure the timing mode has been changed on the chip side + * before changing timings on the controller side. + */ +- if (chip->onfi_version) { ++ if (chip->onfi_version && ++ (le16_to_cpu(chip->onfi_params.opt_cmd) & ++ ONFI_OPT_CMD_SET_GET_FEATURES)) { + u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = { + chip->onfi_timing_mode_default, + }; +diff --git a/drivers/mtd/nand/nand_timings.c b/drivers/mtd/nand/nand_timings.c +index f06312df3669..7e36d7d13c26 100644 +--- a/drivers/mtd/nand/nand_timings.c ++++ b/drivers/mtd/nand/nand_timings.c +@@ -311,9 +311,9 @@ int onfi_init_data_interface(struct nand_chip *chip, + struct nand_sdr_timings *timings = &iface->timings.sdr; + + /* microseconds -> picoseconds */ +- timings->tPROG_max = 1000000UL * le16_to_cpu(params->t_prog); +- timings->tBERS_max = 1000000UL * le16_to_cpu(params->t_bers); +- timings->tR_max = 1000000UL * le16_to_cpu(params->t_r); ++ timings->tPROG_max = 1000000ULL * le16_to_cpu(params->t_prog); ++ timings->tBERS_max = 1000000ULL * le16_to_cpu(params->t_bers); ++ timings->tR_max = 1000000ULL * le16_to_cpu(params->t_r); + + /* nanoseconds -> picoseconds */ + timings->tCCS_min = 1000UL * le16_to_cpu(params->t_ccs); +diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c +index 563901cd9c06..9e5483780c97 100644 +--- a/drivers/pci/pci.c ++++ b/drivers/pci/pci.c +@@ -4069,40 +4069,6 @@ static int pci_dev_reset_slot_function(struct pci_dev *dev, int probe) + return pci_reset_hotplug_slot(dev->slot->hotplug, probe); + } + +-static int __pci_dev_reset(struct pci_dev *dev, int probe) +-{ +- int rc; +- +- might_sleep(); +- +- rc = pci_dev_specific_reset(dev, probe); +- if (rc != -ENOTTY) +- goto done; +- +- if (pcie_has_flr(dev)) { +- if (!probe) +- pcie_flr(dev); +- rc = 0; +- goto done; +- } +- +- rc = pci_af_flr(dev, probe); +- if (rc != -ENOTTY) +- goto done; +- +- rc = pci_pm_reset(dev, probe); +- if (rc != -ENOTTY) +- goto done; +- +- rc = pci_dev_reset_slot_function(dev, probe); +- if (rc != -ENOTTY) +- goto done; +- +- rc = pci_parent_bus_reset(dev, probe); +-done: +- return rc; +-} +- + static void pci_dev_lock(struct pci_dev *dev) + { + pci_cfg_access_lock(dev); +@@ -4141,6 +4107,12 @@ static void pci_reset_notify(struct pci_dev *dev, bool prepare) + { + const struct pci_error_handlers *err_handler = + dev->driver ? dev->driver->err_handler : NULL; ++ ++ /* ++ * dev->driver->err_handler->reset_notify() is protected against ++ * races with ->remove() by the device lock, which must be held by ++ * the caller. ++ */ + if (err_handler && err_handler->reset_notify) + err_handler->reset_notify(dev, prepare); + } +@@ -4173,21 +4145,6 @@ static void pci_dev_restore(struct pci_dev *dev) + pci_reset_notify(dev, false); + } + +-static int pci_dev_reset(struct pci_dev *dev, int probe) +-{ +- int rc; +- +- if (!probe) +- pci_dev_lock(dev); +- +- rc = __pci_dev_reset(dev, probe); +- +- if (!probe) +- pci_dev_unlock(dev); +- +- return rc; +-} +- + /** + * __pci_reset_function - reset a PCI device function + * @dev: PCI device to reset +@@ -4207,7 +4164,13 @@ static int pci_dev_reset(struct pci_dev *dev, int probe) + */ + int __pci_reset_function(struct pci_dev *dev) + { +- return pci_dev_reset(dev, 0); ++ int ret; ++ ++ pci_dev_lock(dev); ++ ret = __pci_reset_function_locked(dev); ++ pci_dev_unlock(dev); ++ ++ return ret; + } + EXPORT_SYMBOL_GPL(__pci_reset_function); + +@@ -4232,7 +4195,27 @@ EXPORT_SYMBOL_GPL(__pci_reset_function); + */ + int __pci_reset_function_locked(struct pci_dev *dev) + { +- return __pci_dev_reset(dev, 0); ++ int rc; ++ ++ might_sleep(); ++ ++ rc = pci_dev_specific_reset(dev, 0); ++ if (rc != -ENOTTY) ++ return rc; ++ if (pcie_has_flr(dev)) { ++ pcie_flr(dev); ++ return 0; ++ } ++ rc = pci_af_flr(dev, 0); ++ if (rc != -ENOTTY) ++ return rc; ++ rc = pci_pm_reset(dev, 0); ++ if (rc != -ENOTTY) ++ return rc; ++ rc = pci_dev_reset_slot_function(dev, 0); ++ if (rc != -ENOTTY) ++ return rc; ++ return pci_parent_bus_reset(dev, 0); + } + EXPORT_SYMBOL_GPL(__pci_reset_function_locked); + +@@ -4249,7 +4232,26 @@ EXPORT_SYMBOL_GPL(__pci_reset_function_locked); + */ + int pci_probe_reset_function(struct pci_dev *dev) + { +- return pci_dev_reset(dev, 1); ++ int rc; ++ ++ might_sleep(); ++ ++ rc = pci_dev_specific_reset(dev, 1); ++ if (rc != -ENOTTY) ++ return rc; ++ if (pcie_has_flr(dev)) ++ return 0; ++ rc = pci_af_flr(dev, 1); ++ if (rc != -ENOTTY) ++ return rc; ++ rc = pci_pm_reset(dev, 1); ++ if (rc != -ENOTTY) ++ return rc; ++ rc = pci_dev_reset_slot_function(dev, 1); ++ if (rc != -ENOTTY) ++ return rc; ++ ++ return pci_parent_bus_reset(dev, 1); + } + + /** +@@ -4272,20 +4274,57 @@ int pci_reset_function(struct pci_dev *dev) + { + int rc; + +- rc = pci_dev_reset(dev, 1); ++ rc = pci_probe_reset_function(dev); + if (rc) + return rc; + ++ pci_dev_lock(dev); + pci_dev_save_and_disable(dev); + +- rc = pci_dev_reset(dev, 0); ++ rc = __pci_reset_function_locked(dev); + + pci_dev_restore(dev); ++ pci_dev_unlock(dev); + + return rc; + } + EXPORT_SYMBOL_GPL(pci_reset_function); + ++/** ++ * pci_reset_function_locked - quiesce and reset a PCI device function ++ * @dev: PCI device to reset ++ * ++ * Some devices allow an individual function to be reset without affecting ++ * other functions in the same device. The PCI device must be responsive ++ * to PCI config space in order to use this function. ++ * ++ * This function does not just reset the PCI portion of a device, but ++ * clears all the state associated with the device. This function differs ++ * from __pci_reset_function() in that it saves and restores device state ++ * over the reset. It also differs from pci_reset_function() in that it ++ * requires the PCI device lock to be held. ++ * ++ * Returns 0 if the device function was successfully reset or negative if the ++ * device doesn't support resetting a single function. ++ */ ++int pci_reset_function_locked(struct pci_dev *dev) ++{ ++ int rc; ++ ++ rc = pci_probe_reset_function(dev); ++ if (rc) ++ return rc; ++ ++ pci_dev_save_and_disable(dev); ++ ++ rc = __pci_reset_function_locked(dev); ++ ++ pci_dev_restore(dev); ++ ++ return rc; ++} ++EXPORT_SYMBOL_GPL(pci_reset_function_locked); ++ + /** + * pci_try_reset_function - quiesce and reset a PCI device function + * @dev: PCI device to reset +@@ -4296,20 +4335,18 @@ int pci_try_reset_function(struct pci_dev *dev) + { + int rc; + +- rc = pci_dev_reset(dev, 1); ++ rc = pci_probe_reset_function(dev); + if (rc) + return rc; + +- pci_dev_save_and_disable(dev); ++ if (!pci_dev_trylock(dev)) ++ return -EAGAIN; + +- if (pci_dev_trylock(dev)) { +- rc = __pci_dev_reset(dev, 0); +- pci_dev_unlock(dev); +- } else +- rc = -EAGAIN; ++ pci_dev_save_and_disable(dev); ++ rc = __pci_reset_function_locked(dev); ++ pci_dev_unlock(dev); + + pci_dev_restore(dev); +- + return rc; + } + EXPORT_SYMBOL_GPL(pci_try_reset_function); +@@ -4459,7 +4496,9 @@ static void pci_bus_save_and_disable(struct pci_bus *bus) + struct pci_dev *dev; + + list_for_each_entry(dev, &bus->devices, bus_list) { ++ pci_dev_lock(dev); + pci_dev_save_and_disable(dev); ++ pci_dev_unlock(dev); + if (dev->subordinate) + pci_bus_save_and_disable(dev->subordinate); + } +@@ -4474,7 +4513,9 @@ static void pci_bus_restore(struct pci_bus *bus) + struct pci_dev *dev; + + list_for_each_entry(dev, &bus->devices, bus_list) { ++ pci_dev_lock(dev); + pci_dev_restore(dev); ++ pci_dev_unlock(dev); + if (dev->subordinate) + pci_bus_restore(dev->subordinate); + } +diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c +index 20f1b4493994..04e929fd0ffe 100644 +--- a/drivers/pinctrl/intel/pinctrl-cherryview.c ++++ b/drivers/pinctrl/intel/pinctrl-cherryview.c +@@ -1547,6 +1547,13 @@ static const struct dmi_system_id chv_no_valid_mask[] = { + DMI_MATCH(DMI_PRODUCT_FAMILY, "Intel_Strago"), + }, + }, ++ { ++ .ident = "HP Chromebook 11 G5 (Setzer)", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "HP"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"), ++ }, ++ }, + { + .ident = "Acer Chromebook R11 (Cyan)", + .matches = { +diff --git a/drivers/pinctrl/intel/pinctrl-merrifield.c b/drivers/pinctrl/intel/pinctrl-merrifield.c +index 4d4ef42a39b5..86c4b3fab7b0 100644 +--- a/drivers/pinctrl/intel/pinctrl-merrifield.c ++++ b/drivers/pinctrl/intel/pinctrl-merrifield.c +@@ -343,9 +343,9 @@ static const struct pinctrl_pin_desc mrfld_pins[] = { + + static const unsigned int mrfld_sdio_pins[] = { 50, 51, 52, 53, 54, 55, 56 }; + static const unsigned int mrfld_spi5_pins[] = { 90, 91, 92, 93, 94, 95, 96 }; +-static const unsigned int mrfld_uart0_pins[] = { 124, 125, 126, 127 }; +-static const unsigned int mrfld_uart1_pins[] = { 128, 129, 130, 131 }; +-static const unsigned int mrfld_uart2_pins[] = { 132, 133, 134, 135 }; ++static const unsigned int mrfld_uart0_pins[] = { 115, 116, 117, 118 }; ++static const unsigned int mrfld_uart1_pins[] = { 119, 120, 121, 122 }; ++static const unsigned int mrfld_uart2_pins[] = { 123, 124, 125, 126 }; + static const unsigned int mrfld_pwm0_pins[] = { 144 }; + static const unsigned int mrfld_pwm1_pins[] = { 145 }; + static const unsigned int mrfld_pwm2_pins[] = { 132 }; +diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +index 9b00be15d258..df942272ba54 100644 +--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c ++++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +@@ -85,6 +85,7 @@ static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = { + MESON_PIN(GPIODV_15, EE_OFF), + MESON_PIN(GPIODV_16, EE_OFF), + MESON_PIN(GPIODV_17, EE_OFF), ++ MESON_PIN(GPIODV_18, EE_OFF), + MESON_PIN(GPIODV_19, EE_OFF), + MESON_PIN(GPIODV_20, EE_OFF), + MESON_PIN(GPIODV_21, EE_OFF), +diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c +index 998210eacf37..3046fd732155 100644 +--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c ++++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c +@@ -89,6 +89,7 @@ static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = { + MESON_PIN(GPIODV_15, EE_OFF), + MESON_PIN(GPIODV_16, EE_OFF), + MESON_PIN(GPIODV_17, EE_OFF), ++ MESON_PIN(GPIODV_18, EE_OFF), + MESON_PIN(GPIODV_19, EE_OFF), + MESON_PIN(GPIODV_20, EE_OFF), + MESON_PIN(GPIODV_21, EE_OFF), +diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +index 5c96f5558310..6aaeb0e9360e 100644 +--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c ++++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +@@ -176,7 +176,7 @@ const struct armada_37xx_pin_data armada_37xx_pin_nb = { + }; + + const struct armada_37xx_pin_data armada_37xx_pin_sb = { +- .nr_pins = 29, ++ .nr_pins = 30, + .name = "GPIO2", + .groups = armada_37xx_sb_groups, + .ngroups = ARRAY_SIZE(armada_37xx_sb_groups), +diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c +index 7b0e6cc35e04..2ea8b1505138 100644 +--- a/drivers/pinctrl/samsung/pinctrl-exynos.c ++++ b/drivers/pinctrl/samsung/pinctrl-exynos.c +@@ -205,8 +205,6 @@ static int exynos_irq_request_resources(struct irq_data *irqd) + + spin_unlock_irqrestore(&bank->slock, flags); + +- exynos_irq_unmask(irqd); +- + return 0; + } + +@@ -226,8 +224,6 @@ static void exynos_irq_release_resources(struct irq_data *irqd) + shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC]; + mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; + +- exynos_irq_mask(irqd); +- + spin_lock_irqsave(&bank->slock, flags); + + con = readl(bank->eint_base + reg_con); +diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c +index fb30b86a97ee..5fbbdbf349b8 100644 +--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c ++++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c +@@ -811,6 +811,7 @@ static const struct sunxi_desc_pin sun4i_a10_pins[] = { + SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD12 */ + SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */ ++ SUNXI_FUNCTION(0x5, "sim"), /* DET */ + SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */ + SUNXI_FUNCTION(0x7, "csi1")), /* D16 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17), +diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c +index 706effe0a492..ad73db8d067b 100644 +--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c ++++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c +@@ -508,57 +508,71 @@ static const unsigned usb1_pins[] = {48, 49}; + static const int usb1_muxvals[] = {0, 0}; + static const unsigned usb2_pins[] = {50, 51}; + static const int usb2_muxvals[] = {0, 0}; +-static const unsigned port_range_pins[] = { ++static const unsigned port_range0_pins[] = { + 159, 160, 161, 162, 163, 164, 165, 166, /* PORT0x */ + 0, 1, 2, 3, 4, 5, 6, 7, /* PORT1x */ + 8, 9, 10, 11, 12, 13, 14, 15, /* PORT2x */ +- 16, 17, 18, -1, -1, -1, -1, -1, /* PORT3x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT4x */ +- -1, -1, -1, 46, 47, 48, 49, 50, /* PORT5x */ +- 51, -1, -1, 54, 55, 56, 57, 58, /* PORT6x */ ++ 16, 17, 18, /* PORT30-32 */ ++}; ++static const int port_range0_muxvals[] = { ++ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ ++ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ ++ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ ++ 15, 15, 15, /* PORT30-32 */ ++}; ++static const unsigned port_range1_pins[] = { ++ 46, 47, 48, 49, 50, /* PORT53-57 */ ++ 51, /* PORT60 */ ++}; ++static const int port_range1_muxvals[] = { ++ 15, 15, 15, 15, 15, /* PORT53-57 */ ++ 15, /* PORT60 */ ++}; ++static const unsigned port_range2_pins[] = { ++ 54, 55, 56, 57, 58, /* PORT63-67 */ + 59, 60, 69, 70, 71, 72, 73, 74, /* PORT7x */ + 75, 76, 77, 78, 79, 80, 81, 82, /* PORT8x */ + 83, 84, 85, 86, 87, 88, 89, 90, /* PORT9x */ + 91, 92, 93, 94, 95, 96, 97, 98, /* PORT10x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ +- 99, 100, 101, 102, 103, 104, 105, 106, /* PORT12x */ +- 107, 108, 109, 110, 111, 112, 113, 114, /* PORT13x */ +- 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ +- 61, 62, 63, 64, 65, 66, 67, 68, /* PORT18x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ +- 123, 124, 125, 126, 127, 128, 129, 130, /* PORT20x */ +- 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */ +- 139, 140, 141, 142, -1, -1, -1, -1, /* PORT22x */ +- 147, 148, 149, 150, 151, 152, 153, 154, /* PORT23x */ +- 155, 156, 157, 143, 144, 145, 146, 158, /* PORT24x */ + }; +-static const int port_range_muxvals[] = { +- 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ +- 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ +- 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ +- 15, 15, 15, -1, -1, -1, -1, -1, /* PORT3x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT4x */ +- -1, -1, -1, 15, 15, 15, 15, 15, /* PORT5x */ +- 15, -1, -1, 15, 15, 15, 15, 15, /* PORT6x */ ++static const int port_range2_muxvals[] = { ++ 15, 15, 15, 15, 15, /* PORT63-67 */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT7x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT8x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT9x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT10x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ ++}; ++static const unsigned port_range3_pins[] = { ++ 99, 100, 101, 102, 103, 104, 105, 106, /* PORT12x */ ++ 107, 108, 109, 110, 111, 112, 113, 114, /* PORT13x */ ++ 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */ ++}; ++static const int port_range3_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT12x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT13x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT14x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ ++}; ++static const unsigned port_range4_pins[] = { ++ 61, 62, 63, 64, 65, 66, 67, 68, /* PORT18x */ ++}; ++static const int port_range4_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT18x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ ++}; ++static const unsigned port_range5_pins[] = { ++ 123, 124, 125, 126, 127, 128, 129, 130, /* PORT20x */ ++ 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */ ++ 139, 140, 141, 142, /* PORT220-223 */ ++}; ++static const int port_range5_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT20x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT21x */ +- 15, 15, 15, 15, -1, -1, -1, -1, /* PORT22x */ ++ 15, 15, 15, 15, /* PORT220-223 */ ++}; ++static const unsigned port_range6_pins[] = { ++ 147, 148, 149, 150, 151, 152, 153, 154, /* PORT23x */ ++ 155, 156, 157, 143, 144, 145, 146, 158, /* PORT24x */ ++}; ++static const int port_range6_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT23x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT24x */ + }; +@@ -607,147 +621,153 @@ static const struct uniphier_pinctrl_group uniphier_ld11_groups[] = { + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), +- UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range0), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range1), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range2), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range3), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range4), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range5), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range6), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq_alternatives), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range, 0), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range, 1), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range, 2), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range, 3), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range, 4), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range, 5), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range, 6), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range, 7), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range, 8), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range, 9), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range, 10), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range, 11), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range, 12), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range, 13), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range, 14), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range, 15), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range, 16), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range, 17), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range, 18), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range, 19), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range, 20), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range, 21), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range, 22), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range, 23), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range, 24), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range, 25), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range, 26), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range, 43), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range, 44), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range, 45), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range, 46), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range, 47), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range, 48), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range, 51), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range, 52), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range, 53), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range, 54), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range, 55), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range, 56), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range, 57), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range, 58), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range, 59), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range, 60), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range, 61), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range, 62), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range, 63), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range, 64), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range, 65), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range, 66), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range, 67), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range, 68), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range, 69), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range, 70), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range, 71), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range, 72), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range, 73), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range, 74), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range, 75), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range, 76), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range, 77), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range, 78), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range, 79), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range, 80), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range, 81), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range, 82), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range, 83), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range, 84), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range, 85), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range, 86), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range, 87), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range, 96), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range, 97), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range, 98), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range, 99), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range, 100), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range, 101), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range, 102), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range, 103), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range, 104), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range, 105), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range, 106), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range, 107), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range, 108), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range, 109), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range, 110), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range, 111), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range, 112), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range, 113), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range, 114), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range, 115), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range, 116), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range, 117), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range, 118), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range, 119), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range, 144), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range, 145), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range, 146), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range, 147), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range, 148), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range, 149), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range, 150), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range, 151), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range, 160), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range, 161), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range, 162), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range, 163), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range, 164), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range, 165), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range, 166), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range, 167), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range, 168), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range, 169), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range, 170), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range, 171), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range, 172), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range, 173), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range, 174), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range, 175), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range, 176), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range, 177), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range, 178), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range, 179), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range, 184), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range, 185), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range, 186), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range, 187), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range, 188), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range, 189), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range, 190), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range, 191), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range, 192), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range, 193), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range, 194), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range, 195), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range, 196), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range, 197), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range, 198), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range, 199), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range0, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range0, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range0, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range0, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range0, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range0, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range0, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range0, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range0, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range0, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range0, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range0, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range0, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range0, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range0, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range0, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range0, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range0, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range0, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range0, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range0, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range0, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range0, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range0, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range0, 24), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range0, 25), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range0, 26), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range1, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range1, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range1, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range1, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range1, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range1, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range2, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range2, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range2, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range2, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range2, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range2, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range2, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range2, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range2, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range2, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range2, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range2, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range2, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range2, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range2, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range2, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range2, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range2, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range2, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range2, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range2, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range2, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range2, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range2, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range2, 24), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range2, 25), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range2, 26), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range2, 27), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range2, 28), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range2, 29), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range2, 30), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range2, 31), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range2, 32), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range2, 33), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range2, 34), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range2, 35), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range2, 36), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range3, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range3, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range3, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range3, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range3, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range3, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range3, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range3, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range3, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range3, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range3, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range3, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range3, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range3, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range3, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range3, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range3, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range3, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range3, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range3, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range3, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range3, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range3, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range3, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range4, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range4, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range4, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range4, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range4, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range4, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range4, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range4, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range5, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range5, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range5, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range5, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range5, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range5, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range5, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range5, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range5, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range5, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range5, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range5, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range5, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range5, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range5, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range5, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range5, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range5, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range5, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range5, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range6, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range6, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range6, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range6, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range6, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range6, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range6, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range6, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range6, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range6, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range6, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range6, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range6, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range6, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range6, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range6, 15), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq0, xirq, 0), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq1, xirq, 1), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq2, xirq, 2), +diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c +index c8d18a2d3a88..93006626028d 100644 +--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c ++++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c +@@ -597,7 +597,7 @@ static const unsigned usb2_pins[] = {50, 51}; + static const int usb2_muxvals[] = {0, 0}; + static const unsigned usb3_pins[] = {52, 53}; + static const int usb3_muxvals[] = {0, 0}; +-static const unsigned port_range_pins[] = { ++static const unsigned port_range0_pins[] = { + 168, 169, 170, 171, 172, 173, 174, 175, /* PORT0x */ + 0, 1, 2, 3, 4, 5, 6, 7, /* PORT1x */ + 8, 9, 10, 11, 12, 13, 14, 15, /* PORT2x */ +@@ -609,23 +609,8 @@ static const unsigned port_range_pins[] = { + 75, 76, 77, 78, 79, 80, 81, 82, /* PORT8x */ + 83, 84, 85, 86, 87, 88, 89, 90, /* PORT9x */ + 91, 92, 93, 94, 95, 96, 97, 98, /* PORT10x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ +- 99, 100, 101, 102, 103, 104, 105, 106, /* PORT12x */ +- 107, 108, 109, 110, 111, 112, 113, 114, /* PORT13x */ +- 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ +- 61, 62, 63, 64, 65, 66, 67, 68, /* PORT18x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ +- 123, 124, 125, 126, 127, 128, 129, 130, /* PORT20x */ +- 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */ +- 139, 140, 141, 142, 143, 144, 145, 146, /* PORT22x */ +- 147, 148, 149, 150, 151, 152, 153, 154, /* PORT23x */ +- 155, 156, 157, 158, 159, 160, 161, 162, /* PORT24x */ +- 163, 164, 165, 166, 167, /* PORT25x */ + }; +-static const int port_range_muxvals[] = { ++static const int port_range0_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ +@@ -637,21 +622,38 @@ static const int port_range_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT8x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT9x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT10x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ ++}; ++static const unsigned port_range1_pins[] = { ++ 99, 100, 101, 102, 103, 104, 105, 106, /* PORT12x */ ++ 107, 108, 109, 110, 111, 112, 113, 114, /* PORT13x */ ++ 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */ ++}; ++static const int port_range1_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT12x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT13x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT14x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ ++}; ++static const unsigned port_range2_pins[] = { ++ 61, 62, 63, 64, 65, 66, 67, 68, /* PORT18x */ ++}; ++static const int port_range2_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT18x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ ++}; ++static const unsigned port_range3_pins[] = { ++ 123, 124, 125, 126, 127, 128, 129, 130, /* PORT20x */ ++ 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */ ++ 139, 140, 141, 142, 143, 144, 145, 146, /* PORT22x */ ++ 147, 148, 149, 150, 151, 152, 153, 154, /* PORT23x */ ++ 155, 156, 157, 158, 159, 160, 161, 162, /* PORT24x */ ++ 163, 164, 165, 166, 167, /* PORT250-254 */ ++}; ++static const int port_range3_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT20x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT21x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT22x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT23x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT24x */ +- 15, 15, 15, 15, 15, /* PORT25x */ ++ 15, 15, 15, 15, 15, /* PORT250-254 */ + }; + static const unsigned xirq_pins[] = { + 149, 150, 151, 152, 153, 154, 155, 156, /* XIRQ0-7 */ +@@ -695,174 +697,177 @@ static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +- UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range0), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range1), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range2), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range3), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq_alternatives), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range, 0), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range, 1), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range, 2), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range, 3), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range, 4), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range, 5), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range, 6), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range, 7), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range, 8), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range, 9), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range, 10), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range, 11), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range, 12), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range, 13), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range, 14), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range, 15), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range, 16), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range, 17), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range, 18), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range, 19), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range, 20), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range, 21), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range, 22), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range, 23), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range, 24), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range, 25), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range, 26), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port33, port_range, 27), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port34, port_range, 28), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port35, port_range, 29), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port36, port_range, 30), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port37, port_range, 31), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port40, port_range, 32), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port41, port_range, 33), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port42, port_range, 34), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port43, port_range, 35), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port44, port_range, 36), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port45, port_range, 37), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port46, port_range, 38), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port47, port_range, 39), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port50, port_range, 40), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port51, port_range, 41), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port52, port_range, 42), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range, 43), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range, 44), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range, 45), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range, 46), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range, 47), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range, 48), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port61, port_range, 49), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port62, port_range, 50), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range, 51), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range, 52), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range, 53), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range, 54), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range, 55), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range, 56), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range, 57), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range, 58), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range, 59), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range, 60), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range, 61), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range, 62), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range, 63), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range, 64), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range, 65), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range, 66), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range, 67), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range, 68), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range, 69), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range, 70), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range, 71), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range, 72), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range, 73), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range, 74), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range, 75), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range, 76), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range, 77), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range, 78), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range, 79), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range, 80), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range, 81), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range, 82), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range, 83), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range, 84), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range, 85), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range, 86), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range, 87), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range, 96), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range, 97), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range, 98), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range, 99), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range, 100), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range, 101), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range, 102), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range, 103), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range, 104), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range, 105), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range, 106), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range, 107), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range, 108), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range, 109), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range, 110), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range, 111), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range, 112), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range, 113), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range, 114), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range, 115), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range, 116), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range, 117), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range, 118), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range, 119), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range, 144), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range, 145), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range, 146), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range, 147), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range, 148), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range, 149), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range, 150), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range, 151), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range, 160), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range, 161), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range, 162), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range, 163), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range, 164), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range, 165), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range, 166), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range, 167), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range, 168), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range, 169), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range, 170), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range, 171), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range, 172), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range, 173), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range, 174), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range, 175), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range, 176), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range, 177), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range, 178), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range, 179), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port224, port_range, 180), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port225, port_range, 181), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port226, port_range, 182), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port227, port_range, 183), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range, 184), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range, 185), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range, 186), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range, 187), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range, 188), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range, 189), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range, 190), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range, 191), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range, 192), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range, 193), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range, 194), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range, 195), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range, 196), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range, 197), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range, 198), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range, 199), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port250, port_range, 200), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port251, port_range, 201), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port252, port_range, 202), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port253, port_range, 203), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port254, port_range, 204), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range0, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range0, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range0, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range0, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range0, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range0, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range0, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range0, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range0, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range0, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range0, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range0, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range0, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range0, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range0, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range0, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range0, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range0, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range0, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range0, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range0, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range0, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range0, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range0, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range0, 24), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range0, 25), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range0, 26), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port33, port_range0, 27), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port34, port_range0, 28), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port35, port_range0, 29), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port36, port_range0, 30), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port37, port_range0, 31), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port40, port_range0, 32), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port41, port_range0, 33), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port42, port_range0, 34), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port43, port_range0, 35), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port44, port_range0, 36), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port45, port_range0, 37), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port46, port_range0, 38), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port47, port_range0, 39), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port50, port_range0, 40), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port51, port_range0, 41), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port52, port_range0, 42), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range0, 43), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range0, 44), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range0, 45), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range0, 46), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range0, 47), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range0, 48), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port61, port_range0, 49), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port62, port_range0, 50), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range0, 51), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range0, 52), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range0, 53), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range0, 54), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range0, 55), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range0, 56), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range0, 57), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range0, 58), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range0, 59), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range0, 60), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range0, 61), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range0, 62), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range0, 63), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range0, 64), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range0, 65), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range0, 66), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range0, 67), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range0, 68), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range0, 69), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range0, 70), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range0, 71), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range0, 72), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range0, 73), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range0, 74), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range0, 75), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range0, 76), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range0, 77), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range0, 78), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range0, 79), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range0, 80), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range0, 81), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range0, 82), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range0, 83), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range0, 84), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range0, 85), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range0, 86), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range0, 87), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range1, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range1, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range1, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range1, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range1, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range1, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range1, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range1, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range1, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range1, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range1, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range1, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range1, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range1, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range1, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range1, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range1, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range1, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range1, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range1, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range1, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range1, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range1, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range1, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range2, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range2, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range2, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range2, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range2, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range2, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range2, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range2, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range3, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range3, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range3, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range3, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range3, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range3, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range3, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range3, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range3, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range3, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range3, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range3, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range3, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range3, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range3, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range3, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range3, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range3, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range3, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range3, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port224, port_range3, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port225, port_range3, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port226, port_range3, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port227, port_range3, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range3, 24), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range3, 25), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range3, 26), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range3, 27), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range3, 28), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range3, 29), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range3, 30), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range3, 31), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range3, 32), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range3, 33), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range3, 34), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range3, 35), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range3, 36), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range3, 37), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range3, 38), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range3, 39), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port250, port_range3, 40), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port251, port_range3, 41), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port252, port_range3, 42), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port253, port_range3, 43), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port254, port_range3, 44), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq0, xirq, 0), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq1, xirq, 1), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq2, xirq, 2), +diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c +index 4ed485a99c68..11d809780ee0 100644 +--- a/drivers/staging/comedi/comedi_fops.c ++++ b/drivers/staging/comedi/comedi_fops.c +@@ -2396,6 +2396,7 @@ static ssize_t comedi_write(struct file *file, const char __user *buf, + continue; + } + ++ set_current_state(TASK_RUNNING); + wp = async->buf_write_ptr; + n1 = min(n, async->prealloc_bufsz - wp); + n2 = n - n1; +@@ -2528,6 +2529,8 @@ static ssize_t comedi_read(struct file *file, char __user *buf, size_t nbytes, + } + continue; + } ++ ++ set_current_state(TASK_RUNNING); + rp = async->buf_read_ptr; + n1 = min(n, async->prealloc_bufsz - rp); + n2 = n - n1; +diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c +index a6a8393d6664..3e00df74b18c 100644 +--- a/drivers/staging/iio/resolver/ad2s1210.c ++++ b/drivers/staging/iio/resolver/ad2s1210.c +@@ -472,7 +472,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, + long m) + { + struct ad2s1210_state *st = iio_priv(indio_dev); +- bool negative; ++ u16 negative; + int ret = 0; + u16 pos; + s16 vel; +diff --git a/drivers/target/iscsi/iscsi_target.c b/drivers/target/iscsi/iscsi_target.c +index 3fdca2cdd8da..db843e3f355a 100644 +--- a/drivers/target/iscsi/iscsi_target.c ++++ b/drivers/target/iscsi/iscsi_target.c +@@ -418,6 +418,7 @@ int iscsit_reset_np_thread( + return 0; + } + np->np_thread_state = ISCSI_NP_THREAD_RESET; ++ atomic_inc(&np->np_reset_count); + + if (np->np_thread) { + spin_unlock_bh(&np->np_thread_lock); +@@ -2173,6 +2174,7 @@ iscsit_setup_text_cmd(struct iscsi_conn *conn, struct iscsi_cmd *cmd, + cmd->cmd_sn = be32_to_cpu(hdr->cmdsn); + cmd->exp_stat_sn = be32_to_cpu(hdr->exp_statsn); + cmd->data_direction = DMA_NONE; ++ kfree(cmd->text_in_ptr); + cmd->text_in_ptr = NULL; + + return 0; +diff --git a/drivers/target/iscsi/iscsi_target_login.c b/drivers/target/iscsi/iscsi_target_login.c +index 92b96b51d506..e491cf75e92d 100644 +--- a/drivers/target/iscsi/iscsi_target_login.c ++++ b/drivers/target/iscsi/iscsi_target_login.c +@@ -1237,9 +1237,11 @@ static int __iscsi_target_login_thread(struct iscsi_np *np) + flush_signals(current); + + spin_lock_bh(&np->np_thread_lock); +- if (np->np_thread_state == ISCSI_NP_THREAD_RESET) { ++ if (atomic_dec_if_positive(&np->np_reset_count) >= 0) { + np->np_thread_state = ISCSI_NP_THREAD_ACTIVE; ++ spin_unlock_bh(&np->np_thread_lock); + complete(&np->np_restart_comp); ++ return 1; + } else if (np->np_thread_state == ISCSI_NP_THREAD_SHUTDOWN) { + spin_unlock_bh(&np->np_thread_lock); + goto exit; +@@ -1272,7 +1274,8 @@ static int __iscsi_target_login_thread(struct iscsi_np *np) + goto exit; + } else if (rc < 0) { + spin_lock_bh(&np->np_thread_lock); +- if (np->np_thread_state == ISCSI_NP_THREAD_RESET) { ++ if (atomic_dec_if_positive(&np->np_reset_count) >= 0) { ++ np->np_thread_state = ISCSI_NP_THREAD_ACTIVE; + spin_unlock_bh(&np->np_thread_lock); + complete(&np->np_restart_comp); + iscsit_put_transport(conn->conn_transport); +diff --git a/drivers/target/target_core_tpg.c b/drivers/target/target_core_tpg.c +index 310d9e55c6eb..2d9ad10de3b3 100644 +--- a/drivers/target/target_core_tpg.c ++++ b/drivers/target/target_core_tpg.c +@@ -364,7 +364,7 @@ void core_tpg_del_initiator_node_acl(struct se_node_acl *acl) + mutex_lock(&tpg->acl_node_mutex); + if (acl->dynamic_node_acl) + acl->dynamic_node_acl = 0; +- list_del(&acl->acl_list); ++ list_del_init(&acl->acl_list); + mutex_unlock(&tpg->acl_node_mutex); + + target_shutdown_sessions(acl); +@@ -548,7 +548,7 @@ int core_tpg_deregister(struct se_portal_group *se_tpg) + * in transport_deregister_session(). + */ + list_for_each_entry_safe(nacl, nacl_tmp, &node_list, acl_list) { +- list_del(&nacl->acl_list); ++ list_del_init(&nacl->acl_list); + + core_tpg_wait_for_nacl_pr_ref(nacl); + core_free_device_list_for_node(nacl, se_tpg); +diff --git a/drivers/target/target_core_transport.c b/drivers/target/target_core_transport.c +index 019763561e52..884780d2ec69 100644 +--- a/drivers/target/target_core_transport.c ++++ b/drivers/target/target_core_transport.c +@@ -466,7 +466,7 @@ static void target_complete_nacl(struct kref *kref) + } + + mutex_lock(&se_tpg->acl_node_mutex); +- list_del(&nacl->acl_list); ++ list_del_init(&nacl->acl_list); + mutex_unlock(&se_tpg->acl_node_mutex); + + core_tpg_wait_for_nacl_pr_ref(nacl); +@@ -538,7 +538,7 @@ void transport_free_session(struct se_session *se_sess) + spin_unlock_irqrestore(&se_nacl->nacl_sess_lock, flags); + + if (se_nacl->dynamic_stop) +- list_del(&se_nacl->acl_list); ++ list_del_init(&se_nacl->acl_list); + } + mutex_unlock(&se_tpg->acl_node_mutex); + +diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c +index 5dea98358c05..cc4121605c53 100644 +--- a/drivers/usb/core/hcd.c ++++ b/drivers/usb/core/hcd.c +@@ -1878,7 +1878,7 @@ void usb_hcd_flush_endpoint(struct usb_device *udev, + /* No more submits can occur */ + spin_lock_irq(&hcd_urb_list_lock); + rescan: +- list_for_each_entry (urb, &ep->urb_list, urb_list) { ++ list_for_each_entry_reverse(urb, &ep->urb_list, urb_list) { + int is_in; + + if (urb->unlinked) +@@ -2475,6 +2475,8 @@ void usb_hc_died (struct usb_hcd *hcd) + } + if (usb_hcd_is_primary_hcd(hcd) && hcd->shared_hcd) { + hcd = hcd->shared_hcd; ++ clear_bit(HCD_FLAG_RH_RUNNING, &hcd->flags); ++ set_bit(HCD_FLAG_DEAD, &hcd->flags); + if (hcd->rh_registered) { + clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); + +diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c +index b8bb20d7acdb..0881a3e8131c 100644 +--- a/drivers/usb/core/hub.c ++++ b/drivers/usb/core/hub.c +@@ -4730,7 +4730,8 @@ hub_power_remaining(struct usb_hub *hub) + static void hub_port_connect(struct usb_hub *hub, int port1, u16 portstatus, + u16 portchange) + { +- int status, i; ++ int status = -ENODEV; ++ int i; + unsigned unit_load; + struct usb_device *hdev = hub->hdev; + struct usb_hcd *hcd = bus_to_hcd(hdev->bus); +@@ -4934,9 +4935,10 @@ static void hub_port_connect(struct usb_hub *hub, int port1, u16 portstatus, + + done: + hub_port_disable(hub, port1, 1); +- if (hcd->driver->relinquish_port && !hub->hdev->parent) +- hcd->driver->relinquish_port(hcd, port1); +- ++ if (hcd->driver->relinquish_port && !hub->hdev->parent) { ++ if (status != -ENOTCONN && status != -ENODEV) ++ hcd->driver->relinquish_port(hcd, port1); ++ } + } + + /* Handle physical or logical connection change events. +diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c +index 3116edfcdc18..574da2b4529c 100644 +--- a/drivers/usb/core/quirks.c ++++ b/drivers/usb/core/quirks.c +@@ -150,6 +150,9 @@ static const struct usb_device_id usb_quirk_list[] = { + /* appletouch */ + { USB_DEVICE(0x05ac, 0x021a), .driver_info = USB_QUIRK_RESET_RESUME }, + ++ /* Genesys Logic hub, internally used by Moshi USB to Ethernet Adapter */ ++ { USB_DEVICE(0x05e3, 0x0616), .driver_info = USB_QUIRK_NO_LPM }, ++ + /* Avision AV600U */ + { USB_DEVICE(0x0638, 0x0a13), .driver_info = + USB_QUIRK_STRING_FETCH_255 }, +@@ -249,6 +252,7 @@ static const struct usb_device_id usb_amd_resume_quirk_list[] = { + { USB_DEVICE(0x093a, 0x2500), .driver_info = USB_QUIRK_RESET_RESUME }, + { USB_DEVICE(0x093a, 0x2510), .driver_info = USB_QUIRK_RESET_RESUME }, + { USB_DEVICE(0x093a, 0x2521), .driver_info = USB_QUIRK_RESET_RESUME }, ++ { USB_DEVICE(0x03f0, 0x2b4a), .driver_info = USB_QUIRK_RESET_RESUME }, + + /* Logitech Optical Mouse M90/M100 */ + { USB_DEVICE(0x046d, 0xc05a), .driver_info = USB_QUIRK_RESET_RESUME }, +diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c +index cd4c88529721..9f3addfca744 100644 +--- a/drivers/usb/gadget/udc/renesas_usb3.c ++++ b/drivers/usb/gadget/udc/renesas_usb3.c +@@ -758,21 +758,32 @@ static struct renesas_usb3_request *usb3_get_request(struct renesas_usb3_ep + return usb3_req; + } + +-static void usb3_request_done(struct renesas_usb3_ep *usb3_ep, +- struct renesas_usb3_request *usb3_req, int status) ++static void __usb3_request_done(struct renesas_usb3_ep *usb3_ep, ++ struct renesas_usb3_request *usb3_req, ++ int status) + { + struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep); +- unsigned long flags; + + dev_dbg(usb3_to_dev(usb3), "giveback: ep%2d, %u, %u, %d\n", + usb3_ep->num, usb3_req->req.length, usb3_req->req.actual, + status); + usb3_req->req.status = status; +- spin_lock_irqsave(&usb3->lock, flags); + usb3_ep->started = false; + list_del_init(&usb3_req->queue); +- spin_unlock_irqrestore(&usb3->lock, flags); ++ spin_unlock(&usb3->lock); + usb_gadget_giveback_request(&usb3_ep->ep, &usb3_req->req); ++ spin_lock(&usb3->lock); ++} ++ ++static void usb3_request_done(struct renesas_usb3_ep *usb3_ep, ++ struct renesas_usb3_request *usb3_req, int status) ++{ ++ struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb3->lock, flags); ++ __usb3_request_done(usb3_ep, usb3_req, status); ++ spin_unlock_irqrestore(&usb3->lock, flags); + } + + static void usb3_irq_epc_pipe0_status_end(struct renesas_usb3 *usb3) +diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c +index c8989c62a262..c8f38649f749 100644 +--- a/drivers/usb/host/pci-quirks.c ++++ b/drivers/usb/host/pci-quirks.c +@@ -98,6 +98,7 @@ enum amd_chipset_gen { + AMD_CHIPSET_HUDSON2, + AMD_CHIPSET_BOLTON, + AMD_CHIPSET_YANGTZE, ++ AMD_CHIPSET_TAISHAN, + AMD_CHIPSET_UNKNOWN, + }; + +@@ -141,6 +142,11 @@ static int amd_chipset_sb_type_init(struct amd_chipset_info *pinfo) + pinfo->sb_type.gen = AMD_CHIPSET_SB700; + else if (rev >= 0x40 && rev <= 0x4f) + pinfo->sb_type.gen = AMD_CHIPSET_SB800; ++ } ++ pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, ++ 0x145c, NULL); ++ if (pinfo->smbus_dev) { ++ pinfo->sb_type.gen = AMD_CHIPSET_TAISHAN; + } else { + pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, + PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL); +@@ -260,11 +266,12 @@ int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev) + { + /* Make sure amd chipset type has already been initialized */ + usb_amd_find_chipset_info(); +- if (amd_chipset.sb_type.gen != AMD_CHIPSET_YANGTZE) +- return 0; +- +- dev_dbg(&pdev->dev, "QUIRK: Enable AMD remote wakeup fix\n"); +- return 1; ++ if (amd_chipset.sb_type.gen == AMD_CHIPSET_YANGTZE || ++ amd_chipset.sb_type.gen == AMD_CHIPSET_TAISHAN) { ++ dev_dbg(&pdev->dev, "QUIRK: Enable AMD remote wakeup fix\n"); ++ return 1; ++ } ++ return 0; + } + EXPORT_SYMBOL_GPL(usb_hcd_amd_remote_wakeup_quirk); + +@@ -1150,3 +1157,23 @@ static void quirk_usb_early_handoff(struct pci_dev *pdev) + } + DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID, + PCI_CLASS_SERIAL_USB, 8, quirk_usb_early_handoff); ++ ++bool usb_xhci_needs_pci_reset(struct pci_dev *pdev) ++{ ++ /* ++ * Our dear uPD72020{1,2} friend only partially resets when ++ * asked to via the XHCI interface, and may end up doing DMA ++ * at the wrong addresses, as it keeps the top 32bit of some ++ * addresses from its previous programming under obscure ++ * circumstances. ++ * Give it a good wack at probe time. Unfortunately, this ++ * needs to happen before we've had a chance to discover any ++ * quirk, or the system will be in a rather bad state. ++ */ ++ if (pdev->vendor == PCI_VENDOR_ID_RENESAS && ++ (pdev->device == 0x0014 || pdev->device == 0x0015)) ++ return true; ++ ++ return false; ++} ++EXPORT_SYMBOL_GPL(usb_xhci_needs_pci_reset); +diff --git a/drivers/usb/host/pci-quirks.h b/drivers/usb/host/pci-quirks.h +index 655994480198..5582cbafecd4 100644 +--- a/drivers/usb/host/pci-quirks.h ++++ b/drivers/usb/host/pci-quirks.h +@@ -15,6 +15,7 @@ void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev); + void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev); + void usb_disable_xhci_ports(struct pci_dev *xhci_pdev); + void sb800_prefetch(struct device *dev, int on); ++bool usb_xhci_needs_pci_reset(struct pci_dev *pdev); + #else + struct pci_dev; + static inline void usb_amd_quirk_pll_disable(void) {} +diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c +index 1ef622ededfd..cefa223f9f08 100644 +--- a/drivers/usb/host/xhci-pci.c ++++ b/drivers/usb/host/xhci-pci.c +@@ -285,6 +285,13 @@ static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) + + driver = (struct hc_driver *)id->driver_data; + ++ /* For some HW implementation, a XHCI reset is just not enough... */ ++ if (usb_xhci_needs_pci_reset(dev)) { ++ dev_info(&dev->dev, "Resetting\n"); ++ if (pci_reset_function_locked(dev)) ++ dev_warn(&dev->dev, "Reset failed"); ++ } ++ + /* Prevent runtime suspending between USB-2 and USB-3 initialization */ + pm_runtime_get_noresume(&dev->dev); + +diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c +index dbe617a735d8..8bb57f76829d 100644 +--- a/drivers/usb/musb/musb_host.c ++++ b/drivers/usb/musb/musb_host.c +@@ -139,6 +139,7 @@ static void musb_h_tx_flush_fifo(struct musb_hw_ep *ep) + "Could not flush host TX%d fifo: csr: %04x\n", + ep->epnum, csr)) + return; ++ mdelay(1); + } + } + +diff --git a/drivers/usb/renesas_usbhs/rcar3.c b/drivers/usb/renesas_usbhs/rcar3.c +index d544b331c9f2..02b67abfc2a1 100644 +--- a/drivers/usb/renesas_usbhs/rcar3.c ++++ b/drivers/usb/renesas_usbhs/rcar3.c +@@ -20,9 +20,13 @@ + /* Low Power Status register (LPSTS) */ + #define LPSTS_SUSPM 0x4000 + +-/* USB General control register 2 (UGCTRL2), bit[31:6] should be 0 */ ++/* ++ * USB General control register 2 (UGCTRL2) ++ * Remarks: bit[31:11] and bit[9:6] should be 0 ++ */ + #define UGCTRL2_RESERVED_3 0x00000001 /* bit[3:0] should be B'0001 */ + #define UGCTRL2_USB0SEL_OTG 0x00000030 ++#define UGCTRL2_VBUSSEL 0x00000400 + + static void usbhs_write32(struct usbhs_priv *priv, u32 reg, u32 data) + { +@@ -34,7 +38,8 @@ static int usbhs_rcar3_power_ctrl(struct platform_device *pdev, + { + struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev); + +- usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 | UGCTRL2_USB0SEL_OTG); ++ usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 | UGCTRL2_USB0SEL_OTG | ++ UGCTRL2_VBUSSEL); + + if (enable) { + usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM); +diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c +index f64e914a8985..2d945c9f975c 100644 +--- a/drivers/usb/serial/cp210x.c ++++ b/drivers/usb/serial/cp210x.c +@@ -142,6 +142,7 @@ static const struct usb_device_id id_table[] = { + { USB_DEVICE(0x10C4, 0x8998) }, /* KCF Technologies PRN */ + { USB_DEVICE(0x10C4, 0x8A2A) }, /* HubZ dual ZigBee and Z-Wave dongle */ + { USB_DEVICE(0x10C4, 0x8A5E) }, /* CEL EM3588 ZigBee USB Stick Long Range */ ++ { USB_DEVICE(0x10C4, 0x8B34) }, /* Qivicon ZigBee USB Radio Stick */ + { USB_DEVICE(0x10C4, 0xEA60) }, /* Silicon Labs factory default */ + { USB_DEVICE(0x10C4, 0xEA61) }, /* Silicon Labs factory default */ + { USB_DEVICE(0x10C4, 0xEA70) }, /* Silicon Labs factory default */ +diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c +index ebe51f11105d..fe123153b1a5 100644 +--- a/drivers/usb/serial/option.c ++++ b/drivers/usb/serial/option.c +@@ -2025,6 +2025,8 @@ static const struct usb_device_id option_ids[] = { + { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d04, 0xff) }, /* D-Link DWM-158 */ + { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7e19, 0xff), /* D-Link DWM-221 B1 */ + .driver_info = (kernel_ulong_t)&net_intf4_blacklist }, ++ { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7e35, 0xff), /* D-Link DWM-222 */ ++ .driver_info = (kernel_ulong_t)&net_intf4_blacklist }, + { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e01, 0xff, 0xff, 0xff) }, /* D-Link DWM-152/C1 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e02, 0xff, 0xff, 0xff) }, /* D-Link DWM-156/C1 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x7e11, 0xff, 0xff, 0xff) }, /* D-Link DWM-156/A3 */ +diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c +index c9ebefd8f35f..a585b477415d 100644 +--- a/drivers/usb/serial/pl2303.c ++++ b/drivers/usb/serial/pl2303.c +@@ -52,6 +52,8 @@ static const struct usb_device_id id_table[] = { + { USB_DEVICE(IODATA_VENDOR_ID, IODATA_PRODUCT_ID_RSAQ5) }, + { USB_DEVICE(ATEN_VENDOR_ID, ATEN_PRODUCT_ID), + .driver_info = PL2303_QUIRK_ENDPOINT_HACK }, ++ { USB_DEVICE(ATEN_VENDOR_ID, ATEN_PRODUCT_UC485), ++ .driver_info = PL2303_QUIRK_ENDPOINT_HACK }, + { USB_DEVICE(ATEN_VENDOR_ID, ATEN_PRODUCT_ID2) }, + { USB_DEVICE(ATEN_VENDOR_ID2, ATEN_PRODUCT_ID) }, + { USB_DEVICE(ELCOM_VENDOR_ID, ELCOM_PRODUCT_ID) }, +diff --git a/drivers/usb/serial/pl2303.h b/drivers/usb/serial/pl2303.h +index 09d9be88209e..3b5a15d1dc0d 100644 +--- a/drivers/usb/serial/pl2303.h ++++ b/drivers/usb/serial/pl2303.h +@@ -27,6 +27,7 @@ + #define ATEN_VENDOR_ID 0x0557 + #define ATEN_VENDOR_ID2 0x0547 + #define ATEN_PRODUCT_ID 0x2008 ++#define ATEN_PRODUCT_UC485 0x2021 + #define ATEN_PRODUCT_ID2 0x2118 + + #define IODATA_VENDOR_ID 0x04bb +diff --git a/drivers/usb/storage/unusual_uas.h b/drivers/usb/storage/unusual_uas.h +index cbea9f329e71..cde115359793 100644 +--- a/drivers/usb/storage/unusual_uas.h ++++ b/drivers/usb/storage/unusual_uas.h +@@ -124,9 +124,9 @@ UNUSUAL_DEV(0x0bc2, 0xab2a, 0x0000, 0x9999, + /* Reported-by: Benjamin Tissoires <benjamin.tissoi...@redhat.com> */ + UNUSUAL_DEV(0x13fd, 0x3940, 0x0000, 0x9999, + "Initio Corporation", +- "", ++ "INIC-3069", + USB_SC_DEVICE, USB_PR_DEVICE, NULL, +- US_FL_NO_ATA_1X), ++ US_FL_NO_ATA_1X | US_FL_IGNORE_RESIDUE), + + /* Reported-by: Tom Arild Naess <tana...@gmail.com> */ + UNUSUAL_DEV(0x152d, 0x0539, 0x0000, 0x9999, +diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c +index 06615934fed1..0dceb9fa3a06 100644 +--- a/drivers/usb/storage/usb.c ++++ b/drivers/usb/storage/usb.c +@@ -315,6 +315,7 @@ static int usb_stor_control_thread(void * __us) + { + struct us_data *us = (struct us_data *)__us; + struct Scsi_Host *host = us_to_host(us); ++ struct scsi_cmnd *srb; + + for (;;) { + usb_stor_dbg(us, "*** thread sleeping\n"); +@@ -330,6 +331,7 @@ static int usb_stor_control_thread(void * __us) + scsi_lock(host); + + /* When we are called with no command pending, we're done */ ++ srb = us->srb; + if (us->srb == NULL) { + scsi_unlock(host); + mutex_unlock(&us->dev_mutex); +@@ -398,14 +400,11 @@ static int usb_stor_control_thread(void * __us) + /* lock access to the state */ + scsi_lock(host); + +- /* indicate that the command is done */ +- if (us->srb->result != DID_ABORT << 16) { +- usb_stor_dbg(us, "scsi cmd done, result=0x%x\n", +- us->srb->result); +- us->srb->scsi_done(us->srb); +- } else { ++ /* was the command aborted? */ ++ if (us->srb->result == DID_ABORT << 16) { + SkipForAbort: + usb_stor_dbg(us, "scsi command aborted\n"); ++ srb = NULL; /* Don't call srb->scsi_done() */ + } + + /* +@@ -429,6 +428,13 @@ static int usb_stor_control_thread(void * __us) + + /* unlock the device pointers */ + mutex_unlock(&us->dev_mutex); ++ ++ /* now that the locks are released, notify the SCSI core */ ++ if (srb) { ++ usb_stor_dbg(us, "scsi cmd done, result=0x%x\n", ++ srb->result); ++ srb->scsi_done(srb); ++ } + } /* for (;;) */ + + /* Wait until we are told to stop */ +diff --git a/fs/fuse/file.c b/fs/fuse/file.c +index 3ee4fdc3da9e..76eac2a554c4 100644 +--- a/fs/fuse/file.c ++++ b/fs/fuse/file.c +@@ -46,7 +46,7 @@ struct fuse_file *fuse_file_alloc(struct fuse_conn *fc) + { + struct fuse_file *ff; + +- ff = kmalloc(sizeof(struct fuse_file), GFP_KERNEL); ++ ff = kzalloc(sizeof(struct fuse_file), GFP_KERNEL); + if (unlikely(!ff)) + return NULL; + +diff --git a/fs/nfs/Kconfig b/fs/nfs/Kconfig +index 69d02cf8cf37..5f93cfacb3d1 100644 +--- a/fs/nfs/Kconfig ++++ b/fs/nfs/Kconfig +@@ -121,6 +121,7 @@ config PNFS_FILE_LAYOUT + config PNFS_BLOCK + tristate + depends on NFS_V4_1 && BLK_DEV_DM ++ depends on 64BIT || LBDAF + default NFS_V4 + + config PNFS_FLEXFILE_LAYOUT +diff --git a/fs/nfs/flexfilelayout/flexfilelayoutdev.c b/fs/nfs/flexfilelayout/flexfilelayoutdev.c +index 6df7a0cf5660..f32c58bbe556 100644 +--- a/fs/nfs/flexfilelayout/flexfilelayoutdev.c ++++ b/fs/nfs/flexfilelayout/flexfilelayoutdev.c +@@ -32,6 +32,7 @@ void nfs4_ff_layout_free_deviceid(struct nfs4_ff_layout_ds *mirror_ds) + { + nfs4_print_deviceid(&mirror_ds->id_node.deviceid); + nfs4_pnfs_ds_put(mirror_ds->ds); ++ kfree(mirror_ds->ds_versions); + kfree_rcu(mirror_ds, id_node.rcu); + } + +diff --git a/fs/xfs/xfs_log_cil.c b/fs/xfs/xfs_log_cil.c +index 82f1cbcc4de1..1f53dc23aebe 100644 +--- a/fs/xfs/xfs_log_cil.c ++++ b/fs/xfs/xfs_log_cil.c +@@ -519,6 +519,7 @@ xlog_discard_endio( + + INIT_WORK(&ctx->discard_endio_work, xlog_discard_endio_work); + queue_work(xfs_discard_wq, &ctx->discard_endio_work); ++ bio_put(bio); + } + + static void +diff --git a/include/linux/iio/common/st_sensors.h b/include/linux/iio/common/st_sensors.h +index 497f2b3a5a62..97f1b465d04f 100644 +--- a/include/linux/iio/common/st_sensors.h ++++ b/include/linux/iio/common/st_sensors.h +@@ -105,6 +105,11 @@ struct st_sensor_fullscale { + struct st_sensor_fullscale_avl fs_avl[ST_SENSORS_FULLSCALE_AVL_MAX]; + }; + ++struct st_sensor_sim { ++ u8 addr; ++ u8 value; ++}; ++ + /** + * struct st_sensor_bdu - ST sensor device block data update + * @addr: address of the register. +@@ -197,6 +202,7 @@ struct st_sensor_transfer_function { + * @bdu: Block data update register. + * @das: Data Alignment Selection register. + * @drdy_irq: Data ready register of the sensor. ++ * @sim: SPI serial interface mode register of the sensor. + * @multi_read_bit: Use or not particular bit for [I2C/SPI] multi-read. + * @bootime: samples to discard when sensor passing from power-down to power-up. + */ +@@ -213,6 +219,7 @@ struct st_sensor_settings { + struct st_sensor_bdu bdu; + struct st_sensor_das das; + struct st_sensor_data_ready_irq drdy_irq; ++ struct st_sensor_sim sim; + bool multi_read_bit; + unsigned int bootime; + }; +diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h +index 8f67b1581683..a3ebb64b1cf4 100644 +--- a/include/linux/mtd/nand.h ++++ b/include/linux/mtd/nand.h +@@ -638,10 +638,10 @@ struct nand_buffers { + * @tWW_min: WP# transition to WE# low + */ + struct nand_sdr_timings { +- u32 tBERS_max; ++ u64 tBERS_max; + u32 tCCS_min; +- u32 tPROG_max; +- u32 tR_max; ++ u64 tPROG_max; ++ u64 tR_max; + u32 tALH_min; + u32 tADL_min; + u32 tALS_min; +diff --git a/include/linux/pci.h b/include/linux/pci.h +index 8039f9f0ca05..16be18678ca1 100644 +--- a/include/linux/pci.h ++++ b/include/linux/pci.h +@@ -1049,6 +1049,7 @@ void pcie_flr(struct pci_dev *dev); + int __pci_reset_function(struct pci_dev *dev); + int __pci_reset_function_locked(struct pci_dev *dev); + int pci_reset_function(struct pci_dev *dev); ++int pci_reset_function_locked(struct pci_dev *dev); + int pci_try_reset_function(struct pci_dev *dev); + int pci_probe_reset_slot(struct pci_slot *slot); + int pci_reset_slot(struct pci_slot *slot); +diff --git a/include/linux/platform_data/st_sensors_pdata.h b/include/linux/platform_data/st_sensors_pdata.h +index 79b0e4cdb814..f8274b0c6888 100644 +--- a/include/linux/platform_data/st_sensors_pdata.h ++++ b/include/linux/platform_data/st_sensors_pdata.h +@@ -17,10 +17,12 @@ + * Available only for accelerometer and pressure sensors. + * Accelerometer DRDY on LSM330 available only on pin 1 (see datasheet). + * @open_drain: set the interrupt line to be open drain if possible. ++ * @spi_3wire: enable spi-3wire mode. + */ + struct st_sensors_platform_data { + u8 drdy_int_pin; + bool open_drain; ++ bool spi_3wire; + }; + + #endif /* ST_SENSORS_PDATA_H */ +diff --git a/include/target/iscsi/iscsi_target_core.h b/include/target/iscsi/iscsi_target_core.h +index 1628cc34b357..ed766dcb9cb7 100644 +--- a/include/target/iscsi/iscsi_target_core.h ++++ b/include/target/iscsi/iscsi_target_core.h +@@ -787,6 +787,7 @@ struct iscsi_np { + int np_sock_type; + enum np_thread_state_table np_thread_state; + bool enabled; ++ atomic_t np_reset_count; + enum iscsi_timer_flags_table np_login_timer_flags; + u32 np_exports; + enum np_flags_table np_flags; +diff --git a/kernel/futex.c b/kernel/futex.c +index 357348a6cf6b..bb8b5a9fcdd5 100644 +--- a/kernel/futex.c ++++ b/kernel/futex.c +@@ -670,13 +670,14 @@ get_futex_key(u32 __user *uaddr, int fshared, union futex_key *key, int rw) + * this reference was taken by ihold under the page lock + * pinning the inode in place so i_lock was unnecessary. The + * only way for this check to fail is if the inode was +- * truncated in parallel so warn for now if this happens. ++ * truncated in parallel which is almost certainly an ++ * application bug. In such a case, just retry. + * + * We are not calling into get_futex_key_refs() in file-backed + * cases, therefore a successful atomic_inc return below will + * guarantee that get_futex_key() will still imply smp_mb(); (B). + */ +- if (WARN_ON_ONCE(!atomic_inc_not_zero(&inode->i_count))) { ++ if (!atomic_inc_not_zero(&inode->i_count)) { + rcu_read_unlock(); + put_page(page); + +diff --git a/mm/page_alloc.c b/mm/page_alloc.c +index 2302f250d6b1..07569fa25760 100644 +--- a/mm/page_alloc.c ++++ b/mm/page_alloc.c +@@ -7567,7 +7567,7 @@ int alloc_contig_range(unsigned long start, unsigned long end, + + /* Make sure the range is really isolated. */ + if (test_pages_isolated(outer_start, end, false)) { +- pr_info("%s: [%lx, %lx) PFNs busy\n", ++ pr_info_ratelimited("%s: [%lx, %lx) PFNs busy\n", + __func__, outer_start, end); + ret = -EBUSY; + goto done; +diff --git a/mm/shmem.c b/mm/shmem.c +index e67d6ba4e98e..1183e898743b 100644 +--- a/mm/shmem.c ++++ b/mm/shmem.c +@@ -1021,7 +1021,11 @@ static int shmem_setattr(struct dentry *dentry, struct iattr *attr) + */ + if (IS_ENABLED(CONFIG_TRANSPARENT_HUGE_PAGECACHE)) { + spin_lock(&sbinfo->shrinklist_lock); +- if (list_empty(&info->shrinklist)) { ++ /* ++ * _careful to defend against unlocked access to ++ * ->shrink_list in shmem_unused_huge_shrink() ++ */ ++ if (list_empty_careful(&info->shrinklist)) { + list_add_tail(&info->shrinklist, + &sbinfo->shrinklist); + sbinfo->shrinklist_len++; +@@ -1817,7 +1821,11 @@ alloc_nohuge: page = shmem_alloc_and_acct_page(gfp, info, sbinfo, + * to shrink under memory pressure. + */ + spin_lock(&sbinfo->shrinklist_lock); +- if (list_empty(&info->shrinklist)) { ++ /* ++ * _careful to defend against unlocked access to ++ * ->shrink_list in shmem_unused_huge_shrink() ++ */ ++ if (list_empty_careful(&info->shrinklist)) { + list_add_tail(&info->shrinklist, + &sbinfo->shrinklist); + sbinfo->shrinklist_len++;
