[gentoo-commits] repo/gentoo:master commit in: eclass/

[Andreas K. Hüttel]

commit:     7029bfc24ddf8702d76d2aa88d39790b15c47961
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Tue May 28 22:57:21 2019 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Tue May 28 22:57:55 2019 +0000
URL:        https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=7029bfc2

toolchain.eclass: add riscv compiler abi configuration

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 eclass/toolchain.eclass | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/eclass/toolchain.eclass b/eclass/toolchain.eclass
index cf6a9533721..3d997fb6581 100644
--- a/eclass/toolchain.eclass
+++ b/eclass/toolchain.eclass
@@ -1213,6 +1213,10 @@ toolchain_src_configure() {
                is-flagq -mfloat-gprs=double && confgcc+=( --enable-e500-double 
)
                [[ ${CTARGET//_/-} == *-e500v2-* ]] && confgcc+=( 
--enable-e500-double )
                ;;
+       riscv)
+               # Add --with-abi flags to set default ABI
+               confgcc+=( --with-abi=$(gcc-abi-map ${TARGET_DEFAULT_ABI}) )
+               ;;
        esac
 
        # if the target can do biarch (-m32/-m64), enable it.  overhead should
@@ -1640,6 +1644,7 @@ gcc-abi-map() {
        local map=()
        case ${CTARGET} in
        mips*)   map=("o32 32" "n32 n32" "n64 64") ;;
+       riscv*)  map=("lp64d lp64d" "lp64 lp64") ;;
        x86_64*) map=("amd64 m64" "x86 m32" "x32 mx32") ;;
        esac