commit: 07dd1095fd4c2871c25d22d002308ad564979b94 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> AuthorDate: Sun Jul 21 14:42:21 2019 +0000 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> CommitDate: Sun Jul 21 14:42:21 2019 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=07dd1095
Linux patch 5.1.19 Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> 0000_README | 4 + 1018_linux-5.1.19.patch | 2234 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 2238 insertions(+) diff --git a/0000_README b/0000_README index 83bea0b..99c9da8 100644 --- a/0000_README +++ b/0000_README @@ -115,6 +115,10 @@ Patch: 1017_linux-5.1.18.patch From: https://www.kernel.org Desc: Linux 5.1.18 +Patch: 1018_linux-5.1.19.patch +From: https://www.kernel.org +Desc: Linux 5.1.19 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1018_linux-5.1.19.patch b/1018_linux-5.1.19.patch new file mode 100644 index 0000000..a1293bd --- /dev/null +++ b/1018_linux-5.1.19.patch @@ -0,0 +1,2234 @@ +diff --git a/Makefile b/Makefile +index 01a0a61f86e7..432a62fec680 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + VERSION = 5 + PATCHLEVEL = 1 +-SUBLEVEL = 18 ++SUBLEVEL = 19 + EXTRAVERSION = + NAME = Shy Crocodile + +diff --git a/arch/arc/kernel/unwind.c b/arch/arc/kernel/unwind.c +index 271e9fafa479..4c221f0edaae 100644 +--- a/arch/arc/kernel/unwind.c ++++ b/arch/arc/kernel/unwind.c +@@ -184,11 +184,6 @@ static void *__init unw_hdr_alloc_early(unsigned long sz) + return memblock_alloc_from(sz, sizeof(unsigned int), MAX_DMA_ADDRESS); + } + +-static void *unw_hdr_alloc(unsigned long sz) +-{ +- return kmalloc(sz, GFP_KERNEL); +-} +- + static void init_unwind_table(struct unwind_table *table, const char *name, + const void *core_start, unsigned long core_size, + const void *init_start, unsigned long init_size, +@@ -369,6 +364,10 @@ ret_err: + } + + #ifdef CONFIG_MODULES ++static void *unw_hdr_alloc(unsigned long sz) ++{ ++ return kmalloc(sz, GFP_KERNEL); ++} + + static struct unwind_table *last_table; + +diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts +index b12504e10f0b..360642a02a48 100644 +--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts ++++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts +@@ -11,7 +11,7 @@ + + / { + model = "D-Link DNS-313 1-Bay Network Storage Enclosure"; +- compatible = "dlink,dir-313", "cortina,gemini"; ++ compatible = "dlink,dns-313", "cortina,gemini"; + #address-cells = <1>; + #size-cells = <1>; + +diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi +index facd65602c2d..572c04296fe1 100644 +--- a/arch/arm/boot/dts/imx6ul.dtsi ++++ b/arch/arm/boot/dts/imx6ul.dtsi +@@ -358,7 +358,7 @@ + pwm1: pwm@2080000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x02080000 0x4000>; +- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_PWM1>, + <&clks IMX6UL_CLK_PWM1>; + clock-names = "ipg", "per"; +@@ -369,7 +369,7 @@ + pwm2: pwm@2084000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x02084000 0x4000>; +- interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_PWM2>, + <&clks IMX6UL_CLK_PWM2>; + clock-names = "ipg", "per"; +@@ -380,7 +380,7 @@ + pwm3: pwm@2088000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x02088000 0x4000>; +- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_PWM3>, + <&clks IMX6UL_CLK_PWM3>; + clock-names = "ipg", "per"; +@@ -391,7 +391,7 @@ + pwm4: pwm@208c000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x0208c000 0x4000>; +- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_PWM4>, + <&clks IMX6UL_CLK_PWM4>; + clock-names = "ipg", "per"; +diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi +index a9781243453e..048b55c8dc1e 100644 +--- a/arch/arm/boot/dts/meson8.dtsi ++++ b/arch/arm/boot/dts/meson8.dtsi +@@ -248,8 +248,8 @@ + <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>, +- <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>, +- <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, +@@ -264,7 +264,6 @@ + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + operating-points-v2 = <&gpu_opp_table>; +- switch-delay = <0xffff>; + }; + }; + }; /* end of / */ +diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi +index fe84a8c3ce81..6b80aff32fc2 100644 +--- a/arch/arm/boot/dts/meson8b.dtsi ++++ b/arch/arm/boot/dts/meson8b.dtsi +@@ -163,23 +163,23 @@ + + opp-255000000 { + opp-hz = /bits/ 64 <255000000>; +- opp-microvolt = <1150000>; ++ opp-microvolt = <1100000>; + }; + opp-364300000 { + opp-hz = /bits/ 64 <364300000>; +- opp-microvolt = <1150000>; ++ opp-microvolt = <1100000>; + }; + opp-425000000 { + opp-hz = /bits/ 64 <425000000>; +- opp-microvolt = <1150000>; ++ opp-microvolt = <1100000>; + }; + opp-510000000 { + opp-hz = /bits/ 64 <510000000>; +- opp-microvolt = <1150000>; ++ opp-microvolt = <1100000>; + }; + opp-637500000 { + opp-hz = /bits/ 64 <637500000>; +- opp-microvolt = <1150000>; ++ opp-microvolt = <1100000>; + turbo-mode; + }; + }; +diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c +index 05858f966f7d..dfa65fc2c82b 100644 +--- a/arch/arm/mach-omap2/prm3xxx.c ++++ b/arch/arm/mach-omap2/prm3xxx.c +@@ -433,7 +433,7 @@ static void omap3_prm_reconfigure_io_chain(void) + * registers, and omap3xxx_prm_reconfigure_io_chain() must be called. + * No return value. + */ +-static void __init omap3xxx_prm_enable_io_wakeup(void) ++static void omap3xxx_prm_enable_io_wakeup(void) + { + if (prm_features & PRM_HAS_IO_WAKEUP) + omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, +diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +index 2896bbcfa3bb..228872549f01 100644 +--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +@@ -28,7 +28,7 @@ + enable-method = "psci"; + clocks = <&clockgen 1 0>; + next-level-cache = <&l2>; +- cpu-idle-states = <&CPU_PH20>; ++ cpu-idle-states = <&CPU_PW20>; + }; + + cpu1: cpu@1 { +@@ -38,7 +38,7 @@ + enable-method = "psci"; + clocks = <&clockgen 1 0>; + next-level-cache = <&l2>; +- cpu-idle-states = <&CPU_PH20>; ++ cpu-idle-states = <&CPU_PW20>; + }; + + l2: l2-cache { +@@ -53,13 +53,13 @@ + */ + entry-method = "arm,psci"; + +- CPU_PH20: cpu-ph20 { +- compatible = "arm,idle-state"; +- idle-state-name = "PH20"; +- arm,psci-suspend-param = <0x00010000>; +- entry-latency-us = <1000>; +- exit-latency-us = <1000>; +- min-residency-us = <3000>; ++ CPU_PW20: cpu-pw20 { ++ compatible = "arm,idle-state"; ++ idle-state-name = "PW20"; ++ arm,psci-suspend-param = <0x0>; ++ entry-latency-us = <2000>; ++ exit-latency-us = <2000>; ++ min-residency-us = <6000>; + }; + }; + +diff --git a/arch/s390/include/asm/facility.h b/arch/s390/include/asm/facility.h +index e78cda94456b..68c476b20b57 100644 +--- a/arch/s390/include/asm/facility.h ++++ b/arch/s390/include/asm/facility.h +@@ -59,6 +59,18 @@ static inline int test_facility(unsigned long nr) + return __test_facility(nr, &S390_lowcore.stfle_fac_list); + } + ++static inline unsigned long __stfle_asm(u64 *stfle_fac_list, int size) ++{ ++ register unsigned long reg0 asm("0") = size - 1; ++ ++ asm volatile( ++ ".insn s,0xb2b00000,0(%1)" /* stfle */ ++ : "+d" (reg0) ++ : "a" (stfle_fac_list) ++ : "memory", "cc"); ++ return reg0; ++} ++ + /** + * stfle - Store facility list extended + * @stfle_fac_list: array where facility list can be stored +@@ -75,13 +87,8 @@ static inline void __stfle(u64 *stfle_fac_list, int size) + memcpy(stfle_fac_list, &S390_lowcore.stfl_fac_list, 4); + if (S390_lowcore.stfl_fac_list & 0x01000000) { + /* More facility bits available with stfle */ +- register unsigned long reg0 asm("0") = size - 1; +- +- asm volatile(".insn s,0xb2b00000,0(%1)" /* stfle */ +- : "+d" (reg0) +- : "a" (stfle_fac_list) +- : "memory", "cc"); +- nr = (reg0 + 1) * 8; /* # bytes stored by stfle */ ++ nr = __stfle_asm(stfle_fac_list, size); ++ nr = min_t(unsigned long, (nr + 1) * 8, size * 8); + } + memset((char *) stfle_fac_list + nr, 0, size * 8 - nr); + } +diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S +index 5fc76b755510..f4afacfd40bb 100644 +--- a/arch/x86/entry/entry_32.S ++++ b/arch/x86/entry/entry_32.S +@@ -1105,6 +1105,30 @@ ENTRY(irq_entries_start) + .endr + END(irq_entries_start) + ++#ifdef CONFIG_X86_LOCAL_APIC ++ .align 8 ++ENTRY(spurious_entries_start) ++ vector=FIRST_SYSTEM_VECTOR ++ .rept (NR_VECTORS - FIRST_SYSTEM_VECTOR) ++ pushl $(~vector+0x80) /* Note: always in signed byte range */ ++ vector=vector+1 ++ jmp common_spurious ++ .align 8 ++ .endr ++END(spurious_entries_start) ++ ++common_spurious: ++ ASM_CLAC ++ addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */ ++ SAVE_ALL switch_stacks=1 ++ ENCODE_FRAME_POINTER ++ TRACE_IRQS_OFF ++ movl %esp, %eax ++ call smp_spurious_interrupt ++ jmp ret_from_intr ++ENDPROC(common_spurious) ++#endif ++ + /* + * the CPU automatically disables interrupts when executing an IRQ vector, + * so IRQ-flags tracing has to follow that: +diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S +index b1d59a7c556e..16a472ddbfe4 100644 +--- a/arch/x86/entry/entry_64.S ++++ b/arch/x86/entry/entry_64.S +@@ -377,6 +377,18 @@ ENTRY(irq_entries_start) + .endr + END(irq_entries_start) + ++ .align 8 ++ENTRY(spurious_entries_start) ++ vector=FIRST_SYSTEM_VECTOR ++ .rept (NR_VECTORS - FIRST_SYSTEM_VECTOR) ++ UNWIND_HINT_IRET_REGS ++ pushq $(~vector+0x80) /* Note: always in signed byte range */ ++ jmp common_spurious ++ .align 8 ++ vector=vector+1 ++ .endr ++END(spurious_entries_start) ++ + .macro DEBUG_ENTRY_ASSERT_IRQS_OFF + #ifdef CONFIG_DEBUG_ENTRY + pushq %rax +@@ -573,10 +585,20 @@ _ASM_NOKPROBE(interrupt_entry) + + /* Interrupt entry/exit. */ + +- /* +- * The interrupt stubs push (~vector+0x80) onto the stack and +- * then jump to common_interrupt. +- */ ++/* ++ * The interrupt stubs push (~vector+0x80) onto the stack and ++ * then jump to common_spurious/interrupt. ++ */ ++common_spurious: ++ addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */ ++ call interrupt_entry ++ UNWIND_HINT_REGS indirect=1 ++ call smp_spurious_interrupt /* rdi points to pt_regs */ ++ jmp ret_from_intr ++END(common_spurious) ++_ASM_NOKPROBE(common_spurious) ++ ++/* common_interrupt is a hotpath. Align it */ + .p2align CONFIG_X86_L1_CACHE_SHIFT + common_interrupt: + addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */ +diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h +index 32e666e1231e..cbd97e22d2f3 100644 +--- a/arch/x86/include/asm/hw_irq.h ++++ b/arch/x86/include/asm/hw_irq.h +@@ -150,8 +150,11 @@ extern char irq_entries_start[]; + #define trace_irq_entries_start irq_entries_start + #endif + ++extern char spurious_entries_start[]; ++ + #define VECTOR_UNUSED NULL +-#define VECTOR_RETRIGGERED ((void *)~0UL) ++#define VECTOR_SHUTDOWN ((void *)~0UL) ++#define VECTOR_RETRIGGERED ((void *)~1UL) + + typedef struct irq_desc* vector_irq_t[NR_VECTORS]; + DECLARE_PER_CPU(vector_irq_t, vector_irq); +diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c +index b7bcdd781651..2b8a57ae57f6 100644 +--- a/arch/x86/kernel/apic/apic.c ++++ b/arch/x86/kernel/apic/apic.c +@@ -1458,7 +1458,8 @@ static void apic_pending_intr_clear(void) + if (queued) { + if (boot_cpu_has(X86_FEATURE_TSC) && cpu_khz) { + ntsc = rdtsc(); +- max_loops = (cpu_khz << 10) - (ntsc - tsc); ++ max_loops = (long long)cpu_khz << 10; ++ max_loops -= ntsc - tsc; + } else { + max_loops--; + } +@@ -2034,21 +2035,32 @@ __visible void __irq_entry smp_spurious_interrupt(struct pt_regs *regs) + entering_irq(); + trace_spurious_apic_entry(vector); + ++ inc_irq_stat(irq_spurious_count); ++ ++ /* ++ * If this is a spurious interrupt then do not acknowledge ++ */ ++ if (vector == SPURIOUS_APIC_VECTOR) { ++ /* See SDM vol 3 */ ++ pr_info("Spurious APIC interrupt (vector 0xFF) on CPU#%d, should never happen.\n", ++ smp_processor_id()); ++ goto out; ++ } ++ + /* +- * Check if this really is a spurious interrupt and ACK it +- * if it is a vectored one. Just in case... +- * Spurious interrupts should not be ACKed. ++ * If it is a vectored one, verify it's set in the ISR. If set, ++ * acknowledge it. + */ + v = apic_read(APIC_ISR + ((vector & ~0x1f) >> 1)); +- if (v & (1 << (vector & 0x1f))) ++ if (v & (1 << (vector & 0x1f))) { ++ pr_info("Spurious interrupt (vector 0x%02x) on CPU#%d. Acked\n", ++ vector, smp_processor_id()); + ack_APIC_irq(); +- +- inc_irq_stat(irq_spurious_count); +- +- /* see sw-dev-man vol 3, chapter 7.4.13.5 */ +- pr_info("spurious APIC interrupt through vector %02x on CPU#%d, " +- "should never happen.\n", vector, smp_processor_id()); +- ++ } else { ++ pr_info("Spurious interrupt (vector 0x%02x) on CPU#%d. Not pending!\n", ++ vector, smp_processor_id()); ++ } ++out: + trace_spurious_apic_exit(vector); + exiting_irq(); + } +diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c +index 53aa234a6803..c9fec0657eea 100644 +--- a/arch/x86/kernel/apic/io_apic.c ++++ b/arch/x86/kernel/apic/io_apic.c +@@ -1893,6 +1893,50 @@ static int ioapic_set_affinity(struct irq_data *irq_data, + return ret; + } + ++/* ++ * Interrupt shutdown masks the ioapic pin, but the interrupt might already ++ * be in flight, but not yet serviced by the target CPU. That means ++ * __synchronize_hardirq() would return and claim that everything is calmed ++ * down. So free_irq() would proceed and deactivate the interrupt and free ++ * resources. ++ * ++ * Once the target CPU comes around to service it it will find a cleared ++ * vector and complain. While the spurious interrupt is harmless, the full ++ * release of resources might prevent the interrupt from being acknowledged ++ * which keeps the hardware in a weird state. ++ * ++ * Verify that the corresponding Remote-IRR bits are clear. ++ */ ++static int ioapic_irq_get_chip_state(struct irq_data *irqd, ++ enum irqchip_irq_state which, ++ bool *state) ++{ ++ struct mp_chip_data *mcd = irqd->chip_data; ++ struct IO_APIC_route_entry rentry; ++ struct irq_pin_list *p; ++ ++ if (which != IRQCHIP_STATE_ACTIVE) ++ return -EINVAL; ++ ++ *state = false; ++ raw_spin_lock(&ioapic_lock); ++ for_each_irq_pin(p, mcd->irq_2_pin) { ++ rentry = __ioapic_read_entry(p->apic, p->pin); ++ /* ++ * The remote IRR is only valid in level trigger mode. It's ++ * meaning is undefined for edge triggered interrupts and ++ * irrelevant because the IO-APIC treats them as fire and ++ * forget. ++ */ ++ if (rentry.irr && rentry.trigger) { ++ *state = true; ++ break; ++ } ++ } ++ raw_spin_unlock(&ioapic_lock); ++ return 0; ++} ++ + static struct irq_chip ioapic_chip __read_mostly = { + .name = "IO-APIC", + .irq_startup = startup_ioapic_irq, +@@ -1902,6 +1946,7 @@ static struct irq_chip ioapic_chip __read_mostly = { + .irq_eoi = ioapic_ack_level, + .irq_set_affinity = ioapic_set_affinity, + .irq_retrigger = irq_chip_retrigger_hierarchy, ++ .irq_get_irqchip_state = ioapic_irq_get_chip_state, + .flags = IRQCHIP_SKIP_SET_WAKE, + }; + +@@ -1914,6 +1959,7 @@ static struct irq_chip ioapic_ir_chip __read_mostly = { + .irq_eoi = ioapic_ir_ack_level, + .irq_set_affinity = ioapic_set_affinity, + .irq_retrigger = irq_chip_retrigger_hierarchy, ++ .irq_get_irqchip_state = ioapic_irq_get_chip_state, + .flags = IRQCHIP_SKIP_SET_WAKE, + }; + +diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c +index 3173e07d3791..1c6d1d5f28d3 100644 +--- a/arch/x86/kernel/apic/vector.c ++++ b/arch/x86/kernel/apic/vector.c +@@ -343,7 +343,7 @@ static void clear_irq_vector(struct irq_data *irqd) + trace_vector_clear(irqd->irq, vector, apicd->cpu, apicd->prev_vector, + apicd->prev_cpu); + +- per_cpu(vector_irq, apicd->cpu)[vector] = VECTOR_UNUSED; ++ per_cpu(vector_irq, apicd->cpu)[vector] = VECTOR_SHUTDOWN; + irq_matrix_free(vector_matrix, apicd->cpu, vector, managed); + apicd->vector = 0; + +@@ -352,7 +352,7 @@ static void clear_irq_vector(struct irq_data *irqd) + if (!vector) + return; + +- per_cpu(vector_irq, apicd->prev_cpu)[vector] = VECTOR_UNUSED; ++ per_cpu(vector_irq, apicd->prev_cpu)[vector] = VECTOR_SHUTDOWN; + irq_matrix_free(vector_matrix, apicd->prev_cpu, vector, managed); + apicd->prev_vector = 0; + apicd->move_in_progress = 0; +diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c +index 16b1cbd3a61e..29ffa495bd1c 100644 +--- a/arch/x86/kernel/head64.c ++++ b/arch/x86/kernel/head64.c +@@ -184,24 +184,25 @@ unsigned long __head __startup_64(unsigned long physaddr, + pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask(); + + if (la57) { +- p4d = fixup_pointer(early_dynamic_pgts[next_early_pgt++], physaddr); ++ p4d = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], ++ physaddr); + + i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD; + pgd[i + 0] = (pgdval_t)p4d + pgtable_flags; + pgd[i + 1] = (pgdval_t)p4d + pgtable_flags; + +- i = (physaddr >> P4D_SHIFT) % PTRS_PER_P4D; +- p4d[i + 0] = (pgdval_t)pud + pgtable_flags; +- p4d[i + 1] = (pgdval_t)pud + pgtable_flags; ++ i = physaddr >> P4D_SHIFT; ++ p4d[(i + 0) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags; ++ p4d[(i + 1) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags; + } else { + i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD; + pgd[i + 0] = (pgdval_t)pud + pgtable_flags; + pgd[i + 1] = (pgdval_t)pud + pgtable_flags; + } + +- i = (physaddr >> PUD_SHIFT) % PTRS_PER_PUD; +- pud[i + 0] = (pudval_t)pmd + pgtable_flags; +- pud[i + 1] = (pudval_t)pmd + pgtable_flags; ++ i = physaddr >> PUD_SHIFT; ++ pud[(i + 0) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags; ++ pud[(i + 1) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags; + + pmd_entry = __PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL; + /* Filter out unsupported __PAGE_KERNEL_* bits: */ +@@ -211,8 +212,9 @@ unsigned long __head __startup_64(unsigned long physaddr, + pmd_entry += physaddr; + + for (i = 0; i < DIV_ROUND_UP(_end - _text, PMD_SIZE); i++) { +- int idx = i + (physaddr >> PMD_SHIFT) % PTRS_PER_PMD; +- pmd[idx] = pmd_entry + i * PMD_SIZE; ++ int idx = i + (physaddr >> PMD_SHIFT); ++ ++ pmd[idx % PTRS_PER_PMD] = pmd_entry + i * PMD_SIZE; + } + + /* +diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c +index 01adea278a71..a7e0e975043f 100644 +--- a/arch/x86/kernel/idt.c ++++ b/arch/x86/kernel/idt.c +@@ -321,7 +321,8 @@ void __init idt_setup_apic_and_irq_gates(void) + #ifdef CONFIG_X86_LOCAL_APIC + for_each_clear_bit_from(i, system_vectors, NR_VECTORS) { + set_bit(i, system_vectors); +- set_intr_gate(i, spurious_interrupt); ++ entry = spurious_entries_start + 8 * (i - FIRST_SYSTEM_VECTOR); ++ set_intr_gate(i, entry); + } + #endif + } +diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c +index 59b5f2ea7c2f..a975246074b5 100644 +--- a/arch/x86/kernel/irq.c ++++ b/arch/x86/kernel/irq.c +@@ -246,7 +246,7 @@ __visible unsigned int __irq_entry do_IRQ(struct pt_regs *regs) + if (!handle_irq(desc, regs)) { + ack_APIC_irq(); + +- if (desc != VECTOR_RETRIGGERED) { ++ if (desc != VECTOR_RETRIGGERED && desc != VECTOR_SHUTDOWN) { + pr_emerg_ratelimited("%s: %d.%d No irq handler for vector\n", + __func__, smp_processor_id(), + vector); +diff --git a/arch/x86/platform/efi/quirks.c b/arch/x86/platform/efi/quirks.c +index a25a9fd987a9..529522c62d89 100644 +--- a/arch/x86/platform/efi/quirks.c ++++ b/arch/x86/platform/efi/quirks.c +@@ -724,7 +724,7 @@ void efi_recover_from_page_fault(unsigned long phys_addr) + * Address range 0x0000 - 0x0fff is always mapped in the efi_pgd, so + * page faulting on these addresses isn't expected. + */ +- if (phys_addr >= 0x0000 && phys_addr <= 0x0fff) ++ if (phys_addr <= 0x0fff) + return; + + /* +diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c +index a7359535caf5..b444f89a2041 100644 +--- a/drivers/base/cacheinfo.c ++++ b/drivers/base/cacheinfo.c +@@ -655,7 +655,8 @@ static int cacheinfo_cpu_pre_down(unsigned int cpu) + + static int __init cacheinfo_sysfs_init(void) + { +- return cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "base/cacheinfo:online", ++ return cpuhp_setup_state(CPUHP_AP_BASE_CACHEINFO_ONLINE, ++ "base/cacheinfo:online", + cacheinfo_cpu_online, cacheinfo_cpu_pre_down); + } + device_initcall(cacheinfo_sysfs_init); +diff --git a/drivers/base/firmware_loader/fallback.c b/drivers/base/firmware_loader/fallback.c +index b5c865fe263b..818d8c37d70a 100644 +--- a/drivers/base/firmware_loader/fallback.c ++++ b/drivers/base/firmware_loader/fallback.c +@@ -659,7 +659,7 @@ static bool fw_run_sysfs_fallback(enum fw_opt opt_flags) + /* Also permit LSMs and IMA to fail firmware sysfs fallback */ + ret = security_kernel_load_data(LOADING_FIRMWARE); + if (ret < 0) +- return ret; ++ return false; + + return fw_force_sysfs_fallback(opt_flags); + } +diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c +index 3325ee43bcc1..626090b59cd7 100644 +--- a/drivers/clk/ti/clkctrl.c ++++ b/drivers/clk/ti/clkctrl.c +@@ -229,6 +229,7 @@ static struct clk_hw *_ti_omap4_clkctrl_xlate(struct of_phandle_args *clkspec, + { + struct omap_clkctrl_provider *provider = data; + struct omap_clkctrl_clk *entry; ++ bool found = false; + + if (clkspec->args_count != 2) + return ERR_PTR(-EINVAL); +@@ -238,11 +239,13 @@ static struct clk_hw *_ti_omap4_clkctrl_xlate(struct of_phandle_args *clkspec, + + list_for_each_entry(entry, &provider->clocks, node) { + if (entry->reg_offset == clkspec->args[0] && +- entry->bit_offset == clkspec->args[1]) ++ entry->bit_offset == clkspec->args[1]) { ++ found = true; + break; ++ } + } + +- if (!entry) ++ if (!found) + return ERR_PTR(-EINVAL); + + return entry->clk; +diff --git a/drivers/crypto/nx/nx-842-powernv.c b/drivers/crypto/nx/nx-842-powernv.c +index c68df7e8bee1..7ce2467c771e 100644 +--- a/drivers/crypto/nx/nx-842-powernv.c ++++ b/drivers/crypto/nx/nx-842-powernv.c +@@ -36,8 +36,6 @@ MODULE_ALIAS_CRYPTO("842-nx"); + #define WORKMEM_ALIGN (CRB_ALIGN) + #define CSB_WAIT_MAX (5000) /* ms */ + #define VAS_RETRIES (10) +-/* # of requests allowed per RxFIFO at a time. 0 for unlimited */ +-#define MAX_CREDITS_PER_RXFIFO (1024) + + struct nx842_workmem { + /* Below fields must be properly aligned */ +@@ -821,7 +819,11 @@ static int __init vas_cfg_coproc_info(struct device_node *dn, int chip_id, + rxattr.lnotify_lpid = lpid; + rxattr.lnotify_pid = pid; + rxattr.lnotify_tid = tid; +- rxattr.wcreds_max = MAX_CREDITS_PER_RXFIFO; ++ /* ++ * Maximum RX window credits can not be more than #CRBs in ++ * RxFIFO. Otherwise, can get checkstop if RxFIFO overruns. ++ */ ++ rxattr.wcreds_max = fifo_size / CRB_SIZE; + + /* + * Open a VAS receice window which is used to configure RxFIFO +diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c +index 0fee83b2eb91..becc654e0cd3 100644 +--- a/drivers/crypto/talitos.c ++++ b/drivers/crypto/talitos.c +@@ -334,6 +334,21 @@ int talitos_submit(struct device *dev, int ch, struct talitos_desc *desc, + } + EXPORT_SYMBOL(talitos_submit); + ++static __be32 get_request_hdr(struct talitos_request *request, bool is_sec1) ++{ ++ struct talitos_edesc *edesc; ++ ++ if (!is_sec1) ++ return request->desc->hdr; ++ ++ if (!request->desc->next_desc) ++ return request->desc->hdr1; ++ ++ edesc = container_of(request->desc, struct talitos_edesc, desc); ++ ++ return ((struct talitos_desc *)(edesc->buf + edesc->dma_len))->hdr1; ++} ++ + /* + * process what was done, notify callback of error if not + */ +@@ -355,12 +370,7 @@ static void flush_channel(struct device *dev, int ch, int error, int reset_ch) + + /* descriptors with their done bits set don't get the error */ + rmb(); +- if (!is_sec1) +- hdr = request->desc->hdr; +- else if (request->desc->next_desc) +- hdr = (request->desc + 1)->hdr1; +- else +- hdr = request->desc->hdr1; ++ hdr = get_request_hdr(request, is_sec1); + + if ((hdr & DESC_HDR_DONE) == DESC_HDR_DONE) + status = 0; +@@ -490,8 +500,14 @@ static u32 current_desc_hdr(struct device *dev, int ch) + } + } + +- if (priv->chan[ch].fifo[iter].desc->next_desc == cur_desc) +- return (priv->chan[ch].fifo[iter].desc + 1)->hdr; ++ if (priv->chan[ch].fifo[iter].desc->next_desc == cur_desc) { ++ struct talitos_edesc *edesc; ++ ++ edesc = container_of(priv->chan[ch].fifo[iter].desc, ++ struct talitos_edesc, desc); ++ return ((struct talitos_desc *) ++ (edesc->buf + edesc->dma_len))->hdr; ++ } + + return priv->chan[ch].fifo[iter].desc->hdr; + } +@@ -913,36 +929,6 @@ badkey: + return -EINVAL; + } + +-/* +- * talitos_edesc - s/w-extended descriptor +- * @src_nents: number of segments in input scatterlist +- * @dst_nents: number of segments in output scatterlist +- * @icv_ool: whether ICV is out-of-line +- * @iv_dma: dma address of iv for checking continuity and link table +- * @dma_len: length of dma mapped link_tbl space +- * @dma_link_tbl: bus physical address of link_tbl/buf +- * @desc: h/w descriptor +- * @link_tbl: input and output h/w link tables (if {src,dst}_nents > 1) (SEC2) +- * @buf: input and output buffeur (if {src,dst}_nents > 1) (SEC1) +- * +- * if decrypting (with authcheck), or either one of src_nents or dst_nents +- * is greater than 1, an integrity check value is concatenated to the end +- * of link_tbl data +- */ +-struct talitos_edesc { +- int src_nents; +- int dst_nents; +- bool icv_ool; +- dma_addr_t iv_dma; +- int dma_len; +- dma_addr_t dma_link_tbl; +- struct talitos_desc desc; +- union { +- struct talitos_ptr link_tbl[0]; +- u8 buf[0]; +- }; +-}; +- + static void talitos_sg_unmap(struct device *dev, + struct talitos_edesc *edesc, + struct scatterlist *src, +@@ -1431,15 +1417,11 @@ static struct talitos_edesc *talitos_edesc_alloc(struct device *dev, + edesc->dst_nents = dst_nents; + edesc->iv_dma = iv_dma; + edesc->dma_len = dma_len; +- if (dma_len) { +- void *addr = &edesc->link_tbl[0]; +- +- if (is_sec1 && !dst) +- addr += sizeof(struct talitos_desc); +- edesc->dma_link_tbl = dma_map_single(dev, addr, ++ if (dma_len) ++ edesc->dma_link_tbl = dma_map_single(dev, &edesc->link_tbl[0], + edesc->dma_len, + DMA_BIDIRECTIONAL); +- } ++ + return edesc; + } + +@@ -1706,14 +1688,16 @@ static void common_nonsnoop_hash_unmap(struct device *dev, + struct talitos_private *priv = dev_get_drvdata(dev); + bool is_sec1 = has_ftr_sec1(priv); + struct talitos_desc *desc = &edesc->desc; +- struct talitos_desc *desc2 = desc + 1; ++ struct talitos_desc *desc2 = (struct talitos_desc *) ++ (edesc->buf + edesc->dma_len); + + unmap_single_talitos_ptr(dev, &edesc->desc.ptr[5], DMA_FROM_DEVICE); + if (desc->next_desc && + desc->ptr[5].ptr != desc2->ptr[5].ptr) + unmap_single_talitos_ptr(dev, &desc2->ptr[5], DMA_FROM_DEVICE); + +- talitos_sg_unmap(dev, edesc, req_ctx->psrc, NULL, 0, 0); ++ if (req_ctx->psrc) ++ talitos_sg_unmap(dev, edesc, req_ctx->psrc, NULL, 0, 0); + + /* When using hashctx-in, must unmap it. */ + if (from_talitos_ptr_len(&edesc->desc.ptr[1], is_sec1)) +@@ -1780,7 +1764,6 @@ static void talitos_handle_buggy_hash(struct talitos_ctx *ctx, + + static int common_nonsnoop_hash(struct talitos_edesc *edesc, + struct ahash_request *areq, unsigned int length, +- unsigned int offset, + void (*callback) (struct device *dev, + struct talitos_desc *desc, + void *context, int error)) +@@ -1819,9 +1802,7 @@ static int common_nonsnoop_hash(struct talitos_edesc *edesc, + + sg_count = edesc->src_nents ?: 1; + if (is_sec1 && sg_count > 1) +- sg_pcopy_to_buffer(req_ctx->psrc, sg_count, +- edesc->buf + sizeof(struct talitos_desc), +- length, req_ctx->nbuf); ++ sg_copy_to_buffer(req_ctx->psrc, sg_count, edesc->buf, length); + else if (length) + sg_count = dma_map_sg(dev, req_ctx->psrc, sg_count, + DMA_TO_DEVICE); +@@ -1834,7 +1815,7 @@ static int common_nonsnoop_hash(struct talitos_edesc *edesc, + DMA_TO_DEVICE); + } else { + sg_count = talitos_sg_map(dev, req_ctx->psrc, length, edesc, +- &desc->ptr[3], sg_count, offset, 0); ++ &desc->ptr[3], sg_count, 0, 0); + if (sg_count > 1) + sync_needed = true; + } +@@ -1858,7 +1839,8 @@ static int common_nonsnoop_hash(struct talitos_edesc *edesc, + talitos_handle_buggy_hash(ctx, edesc, &desc->ptr[3]); + + if (is_sec1 && req_ctx->nbuf && length) { +- struct talitos_desc *desc2 = desc + 1; ++ struct talitos_desc *desc2 = (struct talitos_desc *) ++ (edesc->buf + edesc->dma_len); + dma_addr_t next_desc; + + memset(desc2, 0, sizeof(*desc2)); +@@ -1879,7 +1861,7 @@ static int common_nonsnoop_hash(struct talitos_edesc *edesc, + DMA_TO_DEVICE); + copy_talitos_ptr(&desc2->ptr[2], &desc->ptr[2], is_sec1); + sg_count = talitos_sg_map(dev, req_ctx->psrc, length, edesc, +- &desc2->ptr[3], sg_count, offset, 0); ++ &desc2->ptr[3], sg_count, 0, 0); + if (sg_count > 1) + sync_needed = true; + copy_talitos_ptr(&desc2->ptr[5], &desc->ptr[5], is_sec1); +@@ -1990,7 +1972,6 @@ static int ahash_process_req(struct ahash_request *areq, unsigned int nbytes) + struct device *dev = ctx->dev; + struct talitos_private *priv = dev_get_drvdata(dev); + bool is_sec1 = has_ftr_sec1(priv); +- int offset = 0; + u8 *ctx_buf = req_ctx->buf[req_ctx->buf_idx]; + + if (!req_ctx->last && (nbytes + req_ctx->nbuf <= blocksize)) { +@@ -2030,6 +2011,8 @@ static int ahash_process_req(struct ahash_request *areq, unsigned int nbytes) + sg_chain(req_ctx->bufsl, 2, areq->src); + req_ctx->psrc = req_ctx->bufsl; + } else if (is_sec1 && req_ctx->nbuf && req_ctx->nbuf < blocksize) { ++ int offset; ++ + if (nbytes_to_hash > blocksize) + offset = blocksize - req_ctx->nbuf; + else +@@ -2042,7 +2025,8 @@ static int ahash_process_req(struct ahash_request *areq, unsigned int nbytes) + sg_copy_to_buffer(areq->src, nents, + ctx_buf + req_ctx->nbuf, offset); + req_ctx->nbuf += offset; +- req_ctx->psrc = areq->src; ++ req_ctx->psrc = scatterwalk_ffwd(req_ctx->bufsl, areq->src, ++ offset); + } else + req_ctx->psrc = areq->src; + +@@ -2082,8 +2066,7 @@ static int ahash_process_req(struct ahash_request *areq, unsigned int nbytes) + if (ctx->keylen && (req_ctx->first || req_ctx->last)) + edesc->desc.hdr |= DESC_HDR_MODE0_MDEU_HMAC; + +- return common_nonsnoop_hash(edesc, areq, nbytes_to_hash, offset, +- ahash_done); ++ return common_nonsnoop_hash(edesc, areq, nbytes_to_hash, ahash_done); + } + + static int ahash_update(struct ahash_request *areq) +diff --git a/drivers/crypto/talitos.h b/drivers/crypto/talitos.h +index a65a63e0d6c1..979f6a61e545 100644 +--- a/drivers/crypto/talitos.h ++++ b/drivers/crypto/talitos.h +@@ -65,6 +65,36 @@ struct talitos_desc { + + #define TALITOS_DESC_SIZE (sizeof(struct talitos_desc) - sizeof(__be32)) + ++/* ++ * talitos_edesc - s/w-extended descriptor ++ * @src_nents: number of segments in input scatterlist ++ * @dst_nents: number of segments in output scatterlist ++ * @icv_ool: whether ICV is out-of-line ++ * @iv_dma: dma address of iv for checking continuity and link table ++ * @dma_len: length of dma mapped link_tbl space ++ * @dma_link_tbl: bus physical address of link_tbl/buf ++ * @desc: h/w descriptor ++ * @link_tbl: input and output h/w link tables (if {src,dst}_nents > 1) (SEC2) ++ * @buf: input and output buffeur (if {src,dst}_nents > 1) (SEC1) ++ * ++ * if decrypting (with authcheck), or either one of src_nents or dst_nents ++ * is greater than 1, an integrity check value is concatenated to the end ++ * of link_tbl data ++ */ ++struct talitos_edesc { ++ int src_nents; ++ int dst_nents; ++ bool icv_ool; ++ dma_addr_t iv_dma; ++ int dma_len; ++ dma_addr_t dma_link_tbl; ++ struct talitos_desc desc; ++ union { ++ struct talitos_ptr link_tbl[0]; ++ u8 buf[0]; ++ }; ++}; ++ + /** + * talitos_request - descriptor submission request + * @desc: descriptor pointer (kernel virtual) +diff --git a/drivers/firmware/efi/efi-bgrt.c b/drivers/firmware/efi/efi-bgrt.c +index a2384184a7de..b07c17643210 100644 +--- a/drivers/firmware/efi/efi-bgrt.c ++++ b/drivers/firmware/efi/efi-bgrt.c +@@ -47,11 +47,6 @@ void __init efi_bgrt_init(struct acpi_table_header *table) + bgrt->version); + goto out; + } +- if (bgrt->status & 0xfe) { +- pr_notice("Ignoring BGRT: reserved status bits are non-zero %u\n", +- bgrt->status); +- goto out; +- } + if (bgrt->image_type != 0) { + pr_notice("Ignoring BGRT: invalid image type %u (expected 0)\n", + bgrt->image_type); +diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h +index 6537086fb145..b1636ce22060 100644 +--- a/drivers/hid/hid-ids.h ++++ b/drivers/hid/hid-ids.h +@@ -83,6 +83,7 @@ + #define HID_DEVICE_ID_ALPS_U1_DUAL_3BTN_PTP 0x1220 + #define HID_DEVICE_ID_ALPS_U1 0x1215 + #define HID_DEVICE_ID_ALPS_T4_BTNLESS 0x120C ++#define HID_DEVICE_ID_ALPS_1222 0x1222 + + + #define USB_VENDOR_ID_AMI 0x046b +@@ -272,6 +273,7 @@ + #define USB_DEVICE_ID_CHICONY_MULTI_TOUCH 0xb19d + #define USB_DEVICE_ID_CHICONY_WIRELESS 0x0618 + #define USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE 0x1053 ++#define USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE2 0x0939 + #define USB_DEVICE_ID_CHICONY_WIRELESS2 0x1123 + #define USB_DEVICE_ID_ASUS_AK1D 0x1125 + #define USB_DEVICE_ID_CHICONY_TOSHIBA_WT10A 0x1408 +@@ -571,6 +573,7 @@ + + #define USB_VENDOR_ID_HUION 0x256c + #define USB_DEVICE_ID_HUION_TABLET 0x006e ++#define USB_DEVICE_ID_HUION_HS64 0x006d + + #define USB_VENDOR_ID_IBM 0x04b3 + #define USB_DEVICE_ID_IBM_SCROLLPOINT_III 0x3100 +diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c +index 1565a307170a..42bb635895cf 100644 +--- a/drivers/hid/hid-multitouch.c ++++ b/drivers/hid/hid-multitouch.c +@@ -1780,6 +1780,10 @@ static const struct hid_device_id mt_devices[] = { + HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8, + USB_VENDOR_ID_ALPS_JP, + HID_DEVICE_ID_ALPS_U1_DUAL_3BTN_PTP) }, ++ { .driver_data = MT_CLS_WIN_8_DUAL, ++ HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8, ++ USB_VENDOR_ID_ALPS_JP, ++ HID_DEVICE_ID_ALPS_1222) }, + + /* Lenovo X1 TAB Gen 2 */ + { .driver_data = MT_CLS_WIN_8_DUAL, +diff --git a/drivers/hid/hid-quirks.c b/drivers/hid/hid-quirks.c +index 189bf68eb35c..74c0ad21b267 100644 +--- a/drivers/hid/hid-quirks.c ++++ b/drivers/hid/hid-quirks.c +@@ -45,6 +45,7 @@ static const struct hid_device_id hid_quirks[] = { + { HID_USB_DEVICE(USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_UC100KM), HID_QUIRK_NOGET }, + { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_MULTI_TOUCH), HID_QUIRK_MULTI_INPUT }, + { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE), HID_QUIRK_ALWAYS_POLL }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE2), HID_QUIRK_ALWAYS_POLL }, + { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_WIRELESS), HID_QUIRK_MULTI_INPUT }, + { HID_USB_DEVICE(USB_VENDOR_ID_CHIC, USB_DEVICE_ID_CHIC_GAMEPAD), HID_QUIRK_BADPAD }, + { HID_USB_DEVICE(USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK), HID_QUIRK_NOGET }, +diff --git a/drivers/hid/hid-uclogic-core.c b/drivers/hid/hid-uclogic-core.c +index 8fe02d81265d..914fb527ae7a 100644 +--- a/drivers/hid/hid-uclogic-core.c ++++ b/drivers/hid/hid-uclogic-core.c +@@ -369,6 +369,8 @@ static const struct hid_device_id uclogic_devices[] = { + USB_DEVICE_ID_UCLOGIC_TABLET_TWHA60) }, + { HID_USB_DEVICE(USB_VENDOR_ID_HUION, + USB_DEVICE_ID_HUION_TABLET) }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_HUION, ++ USB_DEVICE_ID_HUION_HS64) }, + { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, + USB_DEVICE_ID_HUION_TABLET) }, + { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, +diff --git a/drivers/hid/hid-uclogic-params.c b/drivers/hid/hid-uclogic-params.c +index 0187c9f8fc22..273d784fff66 100644 +--- a/drivers/hid/hid-uclogic-params.c ++++ b/drivers/hid/hid-uclogic-params.c +@@ -977,6 +977,8 @@ int uclogic_params_init(struct uclogic_params *params, + /* FALL THROUGH */ + case VID_PID(USB_VENDOR_ID_HUION, + USB_DEVICE_ID_HUION_TABLET): ++ case VID_PID(USB_VENDOR_ID_HUION, ++ USB_DEVICE_ID_HUION_HS64): + case VID_PID(USB_VENDOR_ID_UCLOGIC, + USB_DEVICE_ID_HUION_TABLET): + case VID_PID(USB_VENDOR_ID_UCLOGIC, +diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c +index 8e6077d8e434..68fd8232d44c 100644 +--- a/drivers/input/mouse/synaptics.c ++++ b/drivers/input/mouse/synaptics.c +@@ -176,6 +176,7 @@ static const char * const smbus_pnp_ids[] = { + "LEN0072", /* X1 Carbon Gen 5 (2017) - Elan/ALPS trackpoint */ + "LEN0073", /* X1 Carbon G5 (Elantech) */ + "LEN0092", /* X1 Carbon 6 */ ++ "LEN0093", /* T480 */ + "LEN0096", /* X280 */ + "LEN0097", /* X280 -> ALPS trackpoint */ + "LEN200f", /* T450s */ +diff --git a/drivers/irqchip/irq-csky-mpintc.c b/drivers/irqchip/irq-csky-mpintc.c +index c67c961ab6cc..a4c1aacba1ff 100644 +--- a/drivers/irqchip/irq-csky-mpintc.c ++++ b/drivers/irqchip/irq-csky-mpintc.c +@@ -89,8 +89,19 @@ static int csky_irq_set_affinity(struct irq_data *d, + if (cpu >= nr_cpu_ids) + return -EINVAL; + +- /* Enable interrupt destination */ +- cpu |= BIT(31); ++ /* ++ * The csky,mpintc could support auto irq deliver, but it only ++ * could deliver external irq to one cpu or all cpus. So it ++ * doesn't support deliver external irq to a group of cpus ++ * with cpu_mask. ++ * SO we only use auto deliver mode when affinity mask_val is ++ * equal to cpu_present_mask. ++ * ++ */ ++ if (cpumask_equal(mask_val, cpu_present_mask)) ++ cpu = 0; ++ else ++ cpu |= BIT(31); + + writel_relaxed(cpu, INTCG_base + INTCG_CIDSTR + offset); + +diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c +index 7577755bdcf4..eead9def9921 100644 +--- a/drivers/irqchip/irq-gic-v3-its.c ++++ b/drivers/irqchip/irq-gic-v3-its.c +@@ -745,32 +745,43 @@ static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) + } + + static int its_wait_for_range_completion(struct its_node *its, +- struct its_cmd_block *from, ++ u64 prev_idx, + struct its_cmd_block *to) + { +- u64 rd_idx, from_idx, to_idx; ++ u64 rd_idx, to_idx, linear_idx; + u32 count = 1000000; /* 1s! */ + +- from_idx = its_cmd_ptr_to_offset(its, from); ++ /* Linearize to_idx if the command set has wrapped around */ + to_idx = its_cmd_ptr_to_offset(its, to); ++ if (to_idx < prev_idx) ++ to_idx += ITS_CMD_QUEUE_SZ; ++ ++ linear_idx = prev_idx; + + while (1) { ++ s64 delta; ++ + rd_idx = readl_relaxed(its->base + GITS_CREADR); + +- /* Direct case */ +- if (from_idx < to_idx && rd_idx >= to_idx) +- break; ++ /* ++ * Compute the read pointer progress, taking the ++ * potential wrap-around into account. ++ */ ++ delta = rd_idx - prev_idx; ++ if (rd_idx < prev_idx) ++ delta += ITS_CMD_QUEUE_SZ; + +- /* Wrapped case */ +- if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) ++ linear_idx += delta; ++ if (linear_idx >= to_idx) + break; + + count--; + if (!count) { +- pr_err_ratelimited("ITS queue timeout (%llu %llu %llu)\n", +- from_idx, to_idx, rd_idx); ++ pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", ++ to_idx, linear_idx); + return -1; + } ++ prev_idx = rd_idx; + cpu_relax(); + udelay(1); + } +@@ -787,6 +798,7 @@ void name(struct its_node *its, \ + struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ + synctype *sync_obj; \ + unsigned long flags; \ ++ u64 rd_idx; \ + \ + raw_spin_lock_irqsave(&its->lock, flags); \ + \ +@@ -808,10 +820,11 @@ void name(struct its_node *its, \ + } \ + \ + post: \ ++ rd_idx = readl_relaxed(its->base + GITS_CREADR); \ + next_cmd = its_post_commands(its); \ + raw_spin_unlock_irqrestore(&its->lock, flags); \ + \ +- if (its_wait_for_range_completion(its, cmd, next_cmd)) \ ++ if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ + pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ + } + +diff --git a/drivers/md/dm-table.c b/drivers/md/dm-table.c +index 350cf0451456..ec8b27e20de3 100644 +--- a/drivers/md/dm-table.c ++++ b/drivers/md/dm-table.c +@@ -561,7 +561,7 @@ static char **realloc_argv(unsigned *size, char **old_argv) + gfp = GFP_NOIO; + } + argv = kmalloc_array(new_size, sizeof(*argv), gfp); +- if (argv) { ++ if (argv && old_argv) { + memcpy(argv, old_argv, *size * sizeof(*argv)); + *size = new_size; + } +diff --git a/drivers/md/dm-verity-target.c b/drivers/md/dm-verity-target.c +index f4c31ffaa88e..cec1c0ff33eb 100644 +--- a/drivers/md/dm-verity-target.c ++++ b/drivers/md/dm-verity-target.c +@@ -236,8 +236,8 @@ static int verity_handle_err(struct dm_verity *v, enum verity_block_type type, + BUG(); + } + +- DMERR("%s: %s block %llu is corrupted", v->data_dev->name, type_str, +- block); ++ DMERR_LIMIT("%s: %s block %llu is corrupted", v->data_dev->name, ++ type_str, block); + + if (v->corrupted_errs == DM_VERITY_MAX_CORRUPTED_ERRS) + DMERR("%s: reached maximum errors", v->data_dev->name); +diff --git a/drivers/net/ethernet/emulex/benet/be_ethtool.c b/drivers/net/ethernet/emulex/benet/be_ethtool.c +index 6e635debc7fd..cfa01efa5b48 100644 +--- a/drivers/net/ethernet/emulex/benet/be_ethtool.c ++++ b/drivers/net/ethernet/emulex/benet/be_ethtool.c +@@ -895,7 +895,7 @@ static void be_self_test(struct net_device *netdev, struct ethtool_test *test, + u64 *data) + { + struct be_adapter *adapter = netdev_priv(netdev); +- int status; ++ int status, cnt; + u8 link_status = 0; + + if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) { +@@ -906,6 +906,9 @@ static void be_self_test(struct net_device *netdev, struct ethtool_test *test, + + memset(data, 0, sizeof(u64) * ETHTOOL_TESTS_NUM); + ++ /* check link status before offline tests */ ++ link_status = netif_carrier_ok(netdev); ++ + if (test->flags & ETH_TEST_FL_OFFLINE) { + if (be_loopback_test(adapter, BE_MAC_LOOPBACK, &data[0]) != 0) + test->flags |= ETH_TEST_FL_FAILED; +@@ -926,13 +929,26 @@ static void be_self_test(struct net_device *netdev, struct ethtool_test *test, + test->flags |= ETH_TEST_FL_FAILED; + } + +- status = be_cmd_link_status_query(adapter, NULL, &link_status, 0); +- if (status) { +- test->flags |= ETH_TEST_FL_FAILED; +- data[4] = -1; +- } else if (!link_status) { ++ /* link status was down prior to test */ ++ if (!link_status) { + test->flags |= ETH_TEST_FL_FAILED; + data[4] = 1; ++ return; ++ } ++ ++ for (cnt = 10; cnt; cnt--) { ++ status = be_cmd_link_status_query(adapter, NULL, &link_status, ++ 0); ++ if (status) { ++ test->flags |= ETH_TEST_FL_FAILED; ++ data[4] = -1; ++ break; ++ } ++ ++ if (link_status) ++ break; ++ ++ msleep_interruptible(500); + } + } + +diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c +index c10c9d7eadaa..f4a00ee39834 100644 +--- a/drivers/net/ethernet/intel/e1000e/netdev.c ++++ b/drivers/net/ethernet/intel/e1000e/netdev.c +@@ -4209,7 +4209,7 @@ void e1000e_up(struct e1000_adapter *adapter) + e1000_configure_msix(adapter); + e1000_irq_enable(adapter); + +- netif_start_queue(adapter->netdev); ++ /* Tx queue started by watchdog timer when link is up */ + + e1000e_trigger_lsc(adapter); + } +@@ -4607,6 +4607,7 @@ int e1000e_open(struct net_device *netdev) + pm_runtime_get_sync(&pdev->dev); + + netif_carrier_off(netdev); ++ netif_stop_queue(netdev); + + /* allocate transmit descriptors */ + err = e1000e_setup_tx_resources(adapter->tx_ring); +@@ -4667,7 +4668,6 @@ int e1000e_open(struct net_device *netdev) + e1000_irq_enable(adapter); + + adapter->tx_hang_recheck = false; +- netif_start_queue(netdev); + + hw->mac.get_link_status = true; + pm_runtime_put(&pdev->dev); +@@ -5289,6 +5289,7 @@ static void e1000_watchdog_task(struct work_struct *work) + if (phy->ops.cfg_on_link_up) + phy->ops.cfg_on_link_up(hw); + ++ netif_wake_queue(netdev); + netif_carrier_on(netdev); + + if (!test_bit(__E1000_DOWN, &adapter->state)) +@@ -5302,6 +5303,7 @@ static void e1000_watchdog_task(struct work_struct *work) + /* Link status message must follow this format */ + pr_info("%s NIC Link is Down\n", adapter->netdev->name); + netif_carrier_off(netdev); ++ netif_stop_queue(netdev); + if (!test_bit(__E1000_DOWN, &adapter->state)) + mod_timer(&adapter->phy_info_timer, + round_jiffies(jiffies + 2 * HZ)); +@@ -5309,13 +5311,8 @@ static void e1000_watchdog_task(struct work_struct *work) + /* 8000ES2LAN requires a Rx packet buffer work-around + * on link down event; reset the controller to flush + * the Rx packet buffer. +- * +- * If the link is lost the controller stops DMA, but +- * if there is queued Tx work it cannot be done. So +- * reset the controller to flush the Tx packet buffers. + */ +- if ((adapter->flags & FLAG_RX_NEEDS_RESTART) || +- e1000_desc_unused(tx_ring) + 1 < tx_ring->count) ++ if (adapter->flags & FLAG_RX_NEEDS_RESTART) + adapter->flags |= FLAG_RESTART_NOW; + else + pm_schedule_suspend(netdev->dev.parent, +@@ -5338,6 +5335,14 @@ link_up: + adapter->gotc_old = adapter->stats.gotc; + spin_unlock(&adapter->stats64_lock); + ++ /* If the link is lost the controller stops DMA, but ++ * if there is queued Tx work it cannot be done. So ++ * reset the controller to flush the Tx packet buffers. ++ */ ++ if (!netif_carrier_ok(netdev) && ++ (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) ++ adapter->flags |= FLAG_RESTART_NOW; ++ + /* If reset is necessary, do it outside of interrupt context. */ + if (adapter->flags & FLAG_RESTART_NOW) { + schedule_work(&adapter->reset_task); +diff --git a/drivers/net/ethernet/sis/sis900.c b/drivers/net/ethernet/sis/sis900.c +index 67f9bb6e941b..9b036c857b1d 100644 +--- a/drivers/net/ethernet/sis/sis900.c ++++ b/drivers/net/ethernet/sis/sis900.c +@@ -1057,7 +1057,7 @@ sis900_open(struct net_device *net_dev) + sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); + + /* Enable all known interrupts by setting the interrupt mask. */ +- sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); ++ sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE | TxDESC); + sw32(cr, RxENA | sr32(cr)); + sw32(ier, IE); + +@@ -1578,7 +1578,7 @@ static void sis900_tx_timeout(struct net_device *net_dev) + sw32(txdp, sis_priv->tx_ring_dma); + + /* Enable all known interrupts by setting the interrupt mask. */ +- sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); ++ sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE | TxDESC); + } + + /** +@@ -1618,7 +1618,7 @@ sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) + spin_unlock_irqrestore(&sis_priv->lock, flags); + return NETDEV_TX_OK; + } +- sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len); ++ sis_priv->tx_ring[entry].cmdsts = (OWN | INTR | skb->len); + sw32(cr, TxENA | sr32(cr)); + + sis_priv->cur_tx ++; +@@ -1674,7 +1674,7 @@ static irqreturn_t sis900_interrupt(int irq, void *dev_instance) + do { + status = sr32(isr); + +- if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0) ++ if ((status & (HIBERR|TxURN|TxERR|TxIDLE|TxDESC|RxORN|RxERR|RxOK)) == 0) + /* nothing intresting happened */ + break; + handled = 1; +@@ -1684,7 +1684,7 @@ static irqreturn_t sis900_interrupt(int irq, void *dev_instance) + /* Rx interrupt */ + sis900_rx(net_dev); + +- if (status & (TxURN | TxERR | TxIDLE)) ++ if (status & (TxURN | TxERR | TxIDLE | TxDESC)) + /* Tx interrupt */ + sis900_finish_xmit(net_dev); + +@@ -1896,8 +1896,8 @@ static void sis900_finish_xmit (struct net_device *net_dev) + + if (tx_status & OWN) { + /* The packet is not transmitted yet (owned by hardware) ! +- * Note: the interrupt is generated only when Tx Machine +- * is idle, so this is an almost impossible case */ ++ * Note: this is an almost impossible condition ++ * in case of TxDESC ('descriptor interrupt') */ + break; + } + +@@ -2473,7 +2473,7 @@ static int sis900_resume(struct pci_dev *pci_dev) + sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); + + /* Enable all known interrupts by setting the interrupt mask. */ +- sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); ++ sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE | TxDESC); + sw32(cr, RxENA | sr32(cr)); + sw32(ier, IE); + +diff --git a/drivers/net/ppp/ppp_mppe.c b/drivers/net/ppp/ppp_mppe.c +index 7ccdc62c6052..06d620b10704 100644 +--- a/drivers/net/ppp/ppp_mppe.c ++++ b/drivers/net/ppp/ppp_mppe.c +@@ -63,6 +63,7 @@ MODULE_AUTHOR("Frank Cusack <[email protected]>"); + MODULE_DESCRIPTION("Point-to-Point Protocol Microsoft Point-to-Point Encryption support"); + MODULE_LICENSE("Dual BSD/GPL"); + MODULE_ALIAS("ppp-compress-" __stringify(CI_MPPE)); ++MODULE_SOFTDEP("pre: arc4"); + MODULE_VERSION("1.0.2"); + + static unsigned int +diff --git a/drivers/pinctrl/mediatek/mtk-eint.c b/drivers/pinctrl/mediatek/mtk-eint.c +index f464f8cd274b..7e526bcf5e0b 100644 +--- a/drivers/pinctrl/mediatek/mtk-eint.c ++++ b/drivers/pinctrl/mediatek/mtk-eint.c +@@ -113,6 +113,8 @@ static void mtk_eint_mask(struct irq_data *d) + void __iomem *reg = mtk_eint_get_offset(eint, d->hwirq, + eint->regs->mask_set); + ++ eint->cur_mask[d->hwirq >> 5] &= ~mask; ++ + writel(mask, reg); + } + +@@ -123,6 +125,8 @@ static void mtk_eint_unmask(struct irq_data *d) + void __iomem *reg = mtk_eint_get_offset(eint, d->hwirq, + eint->regs->mask_clr); + ++ eint->cur_mask[d->hwirq >> 5] |= mask; ++ + writel(mask, reg); + + if (eint->dual_edge[d->hwirq]) +@@ -217,19 +221,6 @@ static void mtk_eint_chip_write_mask(const struct mtk_eint *eint, + } + } + +-static void mtk_eint_chip_read_mask(const struct mtk_eint *eint, +- void __iomem *base, u32 *buf) +-{ +- int port; +- void __iomem *reg; +- +- for (port = 0; port < eint->hw->ports; port++) { +- reg = base + eint->regs->mask + (port << 2); +- buf[port] = ~readl_relaxed(reg); +- /* Mask is 0 when irq is enabled, and 1 when disabled. */ +- } +-} +- + static int mtk_eint_irq_request_resources(struct irq_data *d) + { + struct mtk_eint *eint = irq_data_get_irq_chip_data(d); +@@ -318,7 +309,7 @@ static void mtk_eint_irq_handler(struct irq_desc *desc) + struct irq_chip *chip = irq_desc_get_chip(desc); + struct mtk_eint *eint = irq_desc_get_handler_data(desc); + unsigned int status, eint_num; +- int offset, index, virq; ++ int offset, mask_offset, index, virq; + void __iomem *reg = mtk_eint_get_offset(eint, 0, eint->regs->stat); + int dual_edge, start_level, curr_level; + +@@ -328,10 +319,24 @@ static void mtk_eint_irq_handler(struct irq_desc *desc) + status = readl(reg); + while (status) { + offset = __ffs(status); ++ mask_offset = eint_num >> 5; + index = eint_num + offset; + virq = irq_find_mapping(eint->domain, index); + status &= ~BIT(offset); + ++ /* ++ * If we get an interrupt on pin that was only required ++ * for wake (but no real interrupt requested), mask the ++ * interrupt (as would mtk_eint_resume do anyway later ++ * in the resume sequence). ++ */ ++ if (eint->wake_mask[mask_offset] & BIT(offset) && ++ !(eint->cur_mask[mask_offset] & BIT(offset))) { ++ writel_relaxed(BIT(offset), reg - ++ eint->regs->stat + ++ eint->regs->mask_set); ++ } ++ + dual_edge = eint->dual_edge[index]; + if (dual_edge) { + /* +@@ -370,7 +375,6 @@ static void mtk_eint_irq_handler(struct irq_desc *desc) + + int mtk_eint_do_suspend(struct mtk_eint *eint) + { +- mtk_eint_chip_read_mask(eint, eint->base, eint->cur_mask); + mtk_eint_chip_write_mask(eint, eint->base, eint->wake_mask); + + return 0; +diff --git a/drivers/pinctrl/pinctrl-mcp23s08.c b/drivers/pinctrl/pinctrl-mcp23s08.c +index 5d7a8514def9..b727de5654cd 100644 +--- a/drivers/pinctrl/pinctrl-mcp23s08.c ++++ b/drivers/pinctrl/pinctrl-mcp23s08.c +@@ -881,6 +881,10 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, + if (ret < 0) + goto fail; + ++ ret = devm_gpiochip_add_data(dev, &mcp->chip, mcp); ++ if (ret < 0) ++ goto fail; ++ + mcp->irq_controller = + device_property_read_bool(dev, "interrupt-controller"); + if (mcp->irq && mcp->irq_controller) { +@@ -922,10 +926,6 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, + goto fail; + } + +- ret = devm_gpiochip_add_data(dev, &mcp->chip, mcp); +- if (ret < 0) +- goto fail; +- + if (one_regmap_config) { + mcp->pinctrl_desc.name = devm_kasprintf(dev, GFP_KERNEL, + "mcp23xxx-pinctrl.%d", raw_chip_address); +diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c +index 3b4ca52d2456..fb76fb2e9ea5 100644 +--- a/drivers/pinctrl/pinctrl-ocelot.c ++++ b/drivers/pinctrl/pinctrl-ocelot.c +@@ -396,7 +396,7 @@ static int ocelot_pin_function_idx(struct ocelot_pinctrl *info, + return -1; + } + +-#define REG(r, info, p) ((r) * (info)->stride + (4 * ((p) / 32))) ++#define REG_ALT(msb, info, p) (OCELOT_GPIO_ALT0 * (info)->stride + 4 * ((msb) + ((info)->stride * ((p) / 32)))) + + static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev, + unsigned int selector, unsigned int group) +@@ -412,19 +412,21 @@ static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev, + + /* + * f is encoded on two bits. +- * bit 0 of f goes in BIT(pin) of ALT0, bit 1 of f goes in BIT(pin) of +- * ALT1 ++ * bit 0 of f goes in BIT(pin) of ALT[0], bit 1 of f goes in BIT(pin) of ++ * ALT[1] + * This is racy because both registers can't be updated at the same time + * but it doesn't matter much for now. + */ +- regmap_update_bits(info->map, REG(OCELOT_GPIO_ALT0, info, pin->pin), ++ regmap_update_bits(info->map, REG_ALT(0, info, pin->pin), + BIT(p), f << p); +- regmap_update_bits(info->map, REG(OCELOT_GPIO_ALT1, info, pin->pin), ++ regmap_update_bits(info->map, REG_ALT(1, info, pin->pin), + BIT(p), f << (p - 1)); + + return 0; + } + ++#define REG(r, info, p) ((r) * (info)->stride + (4 * ((p) / 32))) ++ + static int ocelot_gpio_set_direction(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int pin, bool input) +@@ -432,7 +434,7 @@ static int ocelot_gpio_set_direction(struct pinctrl_dev *pctldev, + struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); + unsigned int p = pin % 32; + +- regmap_update_bits(info->map, REG(OCELOT_GPIO_OE, info, p), BIT(p), ++ regmap_update_bits(info->map, REG(OCELOT_GPIO_OE, info, pin), BIT(p), + input ? 0 : BIT(p)); + + return 0; +@@ -445,9 +447,9 @@ static int ocelot_gpio_request_enable(struct pinctrl_dev *pctldev, + struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); + unsigned int p = offset % 32; + +- regmap_update_bits(info->map, REG(OCELOT_GPIO_ALT0, info, offset), ++ regmap_update_bits(info->map, REG_ALT(0, info, offset), + BIT(p), 0); +- regmap_update_bits(info->map, REG(OCELOT_GPIO_ALT1, info, offset), ++ regmap_update_bits(info->map, REG_ALT(1, info, offset), + BIT(p), 0); + + return 0; +diff --git a/drivers/s390/cio/qdio_setup.c b/drivers/s390/cio/qdio_setup.c +index a59887fad13e..06a9c7e3a63a 100644 +--- a/drivers/s390/cio/qdio_setup.c ++++ b/drivers/s390/cio/qdio_setup.c +@@ -150,6 +150,7 @@ static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues) + return -ENOMEM; + } + irq_ptr_qs[i] = q; ++ INIT_LIST_HEAD(&q->entry); + } + return 0; + } +@@ -178,6 +179,7 @@ static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr, + q->mask = 1 << (31 - i); + q->nr = i; + q->handler = handler; ++ INIT_LIST_HEAD(&q->entry); + } + + static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr, +diff --git a/drivers/s390/cio/qdio_thinint.c b/drivers/s390/cio/qdio_thinint.c +index 07dea602205b..6628e0c9e70e 100644 +--- a/drivers/s390/cio/qdio_thinint.c ++++ b/drivers/s390/cio/qdio_thinint.c +@@ -79,7 +79,6 @@ void tiqdio_add_input_queues(struct qdio_irq *irq_ptr) + mutex_lock(&tiq_list_lock); + list_add_rcu(&irq_ptr->input_qs[0]->entry, &tiq_list); + mutex_unlock(&tiq_list_lock); +- xchg(irq_ptr->dsci, 1 << 7); + } + + void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr) +@@ -87,14 +86,14 @@ void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr) + struct qdio_q *q; + + q = irq_ptr->input_qs[0]; +- /* if establish triggered an error */ +- if (!q || !q->entry.prev || !q->entry.next) ++ if (!q) + return; + + mutex_lock(&tiq_list_lock); + list_del_rcu(&q->entry); + mutex_unlock(&tiq_list_lock); + synchronize_rcu(); ++ INIT_LIST_HEAD(&q->entry); + } + + static inline int has_multiple_inq_on_dsci(struct qdio_irq *irq_ptr) +diff --git a/fs/afs/callback.c b/fs/afs/callback.c +index 128f2dbe256a..fee6fde79e6b 100644 +--- a/fs/afs/callback.c ++++ b/fs/afs/callback.c +@@ -278,9 +278,9 @@ static void afs_break_one_callback(struct afs_server *server, + struct afs_super_info *as = AFS_FS_S(cbi->sb); + struct afs_volume *volume = as->volume; + +- write_lock(&volume->cb_break_lock); ++ write_lock(&volume->cb_v_break_lock); + volume->cb_v_break++; +- write_unlock(&volume->cb_break_lock); ++ write_unlock(&volume->cb_v_break_lock); + } else { + data.volume = NULL; + data.fid = *fid; +diff --git a/fs/afs/internal.h b/fs/afs/internal.h +index 3904ab0b9563..fd0750fb96a5 100644 +--- a/fs/afs/internal.h ++++ b/fs/afs/internal.h +@@ -582,7 +582,7 @@ struct afs_volume { + unsigned int servers_seq; /* Incremented each time ->servers changes */ + + unsigned cb_v_break; /* Break-everything counter. */ +- rwlock_t cb_break_lock; ++ rwlock_t cb_v_break_lock; + + afs_voltype_t type; /* type of volume */ + short error; +diff --git a/fs/afs/volume.c b/fs/afs/volume.c +index f6eba2def0a1..3e8dbee09f87 100644 +--- a/fs/afs/volume.c ++++ b/fs/afs/volume.c +@@ -47,6 +47,7 @@ static struct afs_volume *afs_alloc_volume(struct afs_fs_context *params, + atomic_set(&volume->usage, 1); + INIT_LIST_HEAD(&volume->proc_link); + rwlock_init(&volume->servers_lock); ++ rwlock_init(&volume->cb_v_break_lock); + memcpy(volume->name, vldb->name, vldb->name_len + 1); + + slist = afs_alloc_server_list(params->cell, params->key, vldb, type_mask); +diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h +index 63fedd85c6c5..dec95654f3ae 100644 +--- a/include/linux/cpuhotplug.h ++++ b/include/linux/cpuhotplug.h +@@ -174,6 +174,7 @@ enum cpuhp_state { + CPUHP_AP_WATCHDOG_ONLINE, + CPUHP_AP_WORKQUEUE_ONLINE, + CPUHP_AP_RCUTREE_ONLINE, ++ CPUHP_AP_BASE_CACHEINFO_ONLINE, + CPUHP_AP_ONLINE_DYN, + CPUHP_AP_ONLINE_DYN_END = CPUHP_AP_ONLINE_DYN + 30, + CPUHP_AP_X86_HPET_ONLINE, +diff --git a/include/linux/kernel.h b/include/linux/kernel.h +index 2d14e21c16c0..4330cecd2237 100644 +--- a/include/linux/kernel.h ++++ b/include/linux/kernel.h +@@ -92,7 +92,8 @@ + #define DIV_ROUND_DOWN_ULL(ll, d) \ + ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; }) + +-#define DIV_ROUND_UP_ULL(ll, d) DIV_ROUND_DOWN_ULL((ll) + (d) - 1, (d)) ++#define DIV_ROUND_UP_ULL(ll, d) \ ++ DIV_ROUND_DOWN_ULL((unsigned long long)(ll) + (d) - 1, (d)) + + #if BITS_PER_LONG == 32 + # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d) +diff --git a/include/uapi/linux/nilfs2_ondisk.h b/include/uapi/linux/nilfs2_ondisk.h +index a7e66ab11d1d..c23f91ae5fe8 100644 +--- a/include/uapi/linux/nilfs2_ondisk.h ++++ b/include/uapi/linux/nilfs2_ondisk.h +@@ -29,7 +29,7 @@ + + #include <linux/types.h> + #include <linux/magic.h> +- ++#include <asm/byteorder.h> + + #define NILFS_INODE_BMAP_SIZE 7 + +@@ -533,19 +533,19 @@ enum { + static inline void \ + nilfs_checkpoint_set_##name(struct nilfs_checkpoint *cp) \ + { \ +- cp->cp_flags = cpu_to_le32(le32_to_cpu(cp->cp_flags) | \ +- (1UL << NILFS_CHECKPOINT_##flag)); \ ++ cp->cp_flags = __cpu_to_le32(__le32_to_cpu(cp->cp_flags) | \ ++ (1UL << NILFS_CHECKPOINT_##flag)); \ + } \ + static inline void \ + nilfs_checkpoint_clear_##name(struct nilfs_checkpoint *cp) \ + { \ +- cp->cp_flags = cpu_to_le32(le32_to_cpu(cp->cp_flags) & \ ++ cp->cp_flags = __cpu_to_le32(__le32_to_cpu(cp->cp_flags) & \ + ~(1UL << NILFS_CHECKPOINT_##flag)); \ + } \ + static inline int \ + nilfs_checkpoint_##name(const struct nilfs_checkpoint *cp) \ + { \ +- return !!(le32_to_cpu(cp->cp_flags) & \ ++ return !!(__le32_to_cpu(cp->cp_flags) & \ + (1UL << NILFS_CHECKPOINT_##flag)); \ + } + +@@ -595,20 +595,20 @@ enum { + static inline void \ + nilfs_segment_usage_set_##name(struct nilfs_segment_usage *su) \ + { \ +- su->su_flags = cpu_to_le32(le32_to_cpu(su->su_flags) | \ ++ su->su_flags = __cpu_to_le32(__le32_to_cpu(su->su_flags) | \ + (1UL << NILFS_SEGMENT_USAGE_##flag));\ + } \ + static inline void \ + nilfs_segment_usage_clear_##name(struct nilfs_segment_usage *su) \ + { \ + su->su_flags = \ +- cpu_to_le32(le32_to_cpu(su->su_flags) & \ ++ __cpu_to_le32(__le32_to_cpu(su->su_flags) & \ + ~(1UL << NILFS_SEGMENT_USAGE_##flag)); \ + } \ + static inline int \ + nilfs_segment_usage_##name(const struct nilfs_segment_usage *su) \ + { \ +- return !!(le32_to_cpu(su->su_flags) & \ ++ return !!(__le32_to_cpu(su->su_flags) & \ + (1UL << NILFS_SEGMENT_USAGE_##flag)); \ + } + +@@ -619,15 +619,15 @@ NILFS_SEGMENT_USAGE_FNS(ERROR, error) + static inline void + nilfs_segment_usage_set_clean(struct nilfs_segment_usage *su) + { +- su->su_lastmod = cpu_to_le64(0); +- su->su_nblocks = cpu_to_le32(0); +- su->su_flags = cpu_to_le32(0); ++ su->su_lastmod = __cpu_to_le64(0); ++ su->su_nblocks = __cpu_to_le32(0); ++ su->su_flags = __cpu_to_le32(0); + } + + static inline int + nilfs_segment_usage_clean(const struct nilfs_segment_usage *su) + { +- return !le32_to_cpu(su->su_flags); ++ return !__le32_to_cpu(su->su_flags); + } + + /** +diff --git a/kernel/cpu.c b/kernel/cpu.c +index 6170034f4118..e97e7224ab47 100644 +--- a/kernel/cpu.c ++++ b/kernel/cpu.c +@@ -1954,6 +1954,9 @@ static ssize_t write_cpuhp_fail(struct device *dev, + if (ret) + return ret; + ++ if (fail < CPUHP_OFFLINE || fail > CPUHP_ONLINE) ++ return -EINVAL; ++ + /* + * Cannot fail STARTING/DYING callbacks. + */ +diff --git a/kernel/events/core.c b/kernel/events/core.c +index dc7dead2d2cc..f33bd0a89391 100644 +--- a/kernel/events/core.c ++++ b/kernel/events/core.c +@@ -5913,7 +5913,7 @@ static void perf_sample_regs_user(struct perf_regs *regs_user, + if (user_mode(regs)) { + regs_user->abi = perf_reg_abi(current); + regs_user->regs = regs; +- } else if (current->mm) { ++ } else if (!(current->flags & PF_KTHREAD)) { + perf_get_regs_user(regs_user, regs, regs_user_copy); + } else { + regs_user->abi = PERF_SAMPLE_REGS_ABI_NONE; +diff --git a/kernel/fork.c b/kernel/fork.c +index 2628f3773ca8..ee24fea0eede 100644 +--- a/kernel/fork.c ++++ b/kernel/fork.c +@@ -245,7 +245,11 @@ static unsigned long *alloc_thread_stack_node(struct task_struct *tsk, int node) + struct page *page = alloc_pages_node(node, THREADINFO_GFP, + THREAD_SIZE_ORDER); + +- return page ? page_address(page) : NULL; ++ if (likely(page)) { ++ tsk->stack = page_address(page); ++ return tsk->stack; ++ } ++ return NULL; + #endif + } + +diff --git a/kernel/irq/autoprobe.c b/kernel/irq/autoprobe.c +index 16cbf6beb276..ae60cae24e9a 100644 +--- a/kernel/irq/autoprobe.c ++++ b/kernel/irq/autoprobe.c +@@ -90,7 +90,7 @@ unsigned long probe_irq_on(void) + /* It triggered already - consider it spurious. */ + if (!(desc->istate & IRQS_WAITING)) { + desc->istate &= ~IRQS_AUTODETECT; +- irq_shutdown(desc); ++ irq_shutdown_and_deactivate(desc); + } else + if (i < 32) + mask |= 1 << i; +@@ -127,7 +127,7 @@ unsigned int probe_irq_mask(unsigned long val) + mask |= 1 << i; + + desc->istate &= ~IRQS_AUTODETECT; +- irq_shutdown(desc); ++ irq_shutdown_and_deactivate(desc); + } + raw_spin_unlock_irq(&desc->lock); + } +@@ -169,7 +169,7 @@ int probe_irq_off(unsigned long val) + nr_of_irqs++; + } + desc->istate &= ~IRQS_AUTODETECT; +- irq_shutdown(desc); ++ irq_shutdown_and_deactivate(desc); + } + raw_spin_unlock_irq(&desc->lock); + } +diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c +index 51128bea3846..04fe4f989bd8 100644 +--- a/kernel/irq/chip.c ++++ b/kernel/irq/chip.c +@@ -314,6 +314,12 @@ void irq_shutdown(struct irq_desc *desc) + } + irq_state_clr_started(desc); + } ++} ++ ++ ++void irq_shutdown_and_deactivate(struct irq_desc *desc) ++{ ++ irq_shutdown(desc); + /* + * This must be called even if the interrupt was never started up, + * because the activation can happen before the interrupt is +diff --git a/kernel/irq/cpuhotplug.c b/kernel/irq/cpuhotplug.c +index 5b1072e394b2..6c7ca2e983a5 100644 +--- a/kernel/irq/cpuhotplug.c ++++ b/kernel/irq/cpuhotplug.c +@@ -116,7 +116,7 @@ static bool migrate_one_irq(struct irq_desc *desc) + */ + if (irqd_affinity_is_managed(d)) { + irqd_set_managed_shutdown(d); +- irq_shutdown(desc); ++ irq_shutdown_and_deactivate(desc); + return false; + } + affinity = cpu_online_mask; +diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h +index 70c3053bc1f6..3a948f41ab00 100644 +--- a/kernel/irq/internals.h ++++ b/kernel/irq/internals.h +@@ -82,6 +82,7 @@ extern int irq_activate_and_startup(struct irq_desc *desc, bool resend); + extern int irq_startup(struct irq_desc *desc, bool resend, bool force); + + extern void irq_shutdown(struct irq_desc *desc); ++extern void irq_shutdown_and_deactivate(struct irq_desc *desc); + extern void irq_enable(struct irq_desc *desc); + extern void irq_disable(struct irq_desc *desc); + extern void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu); +@@ -96,6 +97,10 @@ static inline void irq_mark_irq(unsigned int irq) { } + extern void irq_mark_irq(unsigned int irq); + #endif + ++extern int __irq_get_irqchip_state(struct irq_data *data, ++ enum irqchip_irq_state which, ++ bool *state); ++ + extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr); + + irqreturn_t __handle_irq_event_percpu(struct irq_desc *desc, unsigned int *flags); +diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c +index 53a081392115..fad61986f35c 100644 +--- a/kernel/irq/manage.c ++++ b/kernel/irq/manage.c +@@ -13,6 +13,7 @@ + #include <linux/module.h> + #include <linux/random.h> + #include <linux/interrupt.h> ++#include <linux/irqdomain.h> + #include <linux/slab.h> + #include <linux/sched.h> + #include <linux/sched/rt.h> +@@ -34,8 +35,9 @@ static int __init setup_forced_irqthreads(char *arg) + early_param("threadirqs", setup_forced_irqthreads); + #endif + +-static void __synchronize_hardirq(struct irq_desc *desc) ++static void __synchronize_hardirq(struct irq_desc *desc, bool sync_chip) + { ++ struct irq_data *irqd = irq_desc_get_irq_data(desc); + bool inprogress; + + do { +@@ -51,6 +53,20 @@ static void __synchronize_hardirq(struct irq_desc *desc) + /* Ok, that indicated we're done: double-check carefully. */ + raw_spin_lock_irqsave(&desc->lock, flags); + inprogress = irqd_irq_inprogress(&desc->irq_data); ++ ++ /* ++ * If requested and supported, check at the chip whether it ++ * is in flight at the hardware level, i.e. already pending ++ * in a CPU and waiting for service and acknowledge. ++ */ ++ if (!inprogress && sync_chip) { ++ /* ++ * Ignore the return code. inprogress is only updated ++ * when the chip supports it. ++ */ ++ __irq_get_irqchip_state(irqd, IRQCHIP_STATE_ACTIVE, ++ &inprogress); ++ } + raw_spin_unlock_irqrestore(&desc->lock, flags); + + /* Oops, that failed? */ +@@ -73,13 +89,18 @@ static void __synchronize_hardirq(struct irq_desc *desc) + * Returns: false if a threaded handler is active. + * + * This function may be called - with care - from IRQ context. ++ * ++ * It does not check whether there is an interrupt in flight at the ++ * hardware level, but not serviced yet, as this might deadlock when ++ * called with interrupts disabled and the target CPU of the interrupt ++ * is the current CPU. + */ + bool synchronize_hardirq(unsigned int irq) + { + struct irq_desc *desc = irq_to_desc(irq); + + if (desc) { +- __synchronize_hardirq(desc); ++ __synchronize_hardirq(desc, false); + return !atomic_read(&desc->threads_active); + } + +@@ -95,14 +116,19 @@ EXPORT_SYMBOL(synchronize_hardirq); + * to complete before returning. If you use this function while + * holding a resource the IRQ handler may need you will deadlock. + * +- * This function may be called - with care - from IRQ context. ++ * Can only be called from preemptible code as it might sleep when ++ * an interrupt thread is associated to @irq. ++ * ++ * It optionally makes sure (when the irq chip supports that method) ++ * that the interrupt is not pending in any CPU and waiting for ++ * service. + */ + void synchronize_irq(unsigned int irq) + { + struct irq_desc *desc = irq_to_desc(irq); + + if (desc) { +- __synchronize_hardirq(desc); ++ __synchronize_hardirq(desc, true); + /* + * We made sure that no hardirq handler is + * running. Now verify that no threaded handlers are +@@ -1699,6 +1725,7 @@ static struct irqaction *__free_irq(struct irq_desc *desc, void *dev_id) + /* If this was the last handler, shut down the IRQ line: */ + if (!desc->action) { + irq_settings_clr_disable_unlazy(desc); ++ /* Only shutdown. Deactivate after synchronize_hardirq() */ + irq_shutdown(desc); + } + +@@ -1727,8 +1754,12 @@ static struct irqaction *__free_irq(struct irq_desc *desc, void *dev_id) + + unregister_handler_proc(irq, action); + +- /* Make sure it's not being used on another CPU: */ +- synchronize_hardirq(irq); ++ /* ++ * Make sure it's not being used on another CPU and if the chip ++ * supports it also make sure that there is no (not yet serviced) ++ * interrupt in flight at the hardware level. ++ */ ++ __synchronize_hardirq(desc, true); + + #ifdef CONFIG_DEBUG_SHIRQ + /* +@@ -1768,6 +1799,14 @@ static struct irqaction *__free_irq(struct irq_desc *desc, void *dev_id) + * require it to deallocate resources over the slow bus. + */ + chip_bus_lock(desc); ++ /* ++ * There is no interrupt on the fly anymore. Deactivate it ++ * completely. ++ */ ++ raw_spin_lock_irqsave(&desc->lock, flags); ++ irq_domain_deactivate_irq(&desc->irq_data); ++ raw_spin_unlock_irqrestore(&desc->lock, flags); ++ + irq_release_resources(desc); + chip_bus_sync_unlock(desc); + irq_remove_timings(desc); +@@ -1855,7 +1894,7 @@ static const void *__cleanup_nmi(unsigned int irq, struct irq_desc *desc) + } + + irq_settings_clr_disable_unlazy(desc); +- irq_shutdown(desc); ++ irq_shutdown_and_deactivate(desc); + + irq_release_resources(desc); + +@@ -2578,6 +2617,28 @@ out: + irq_put_desc_unlock(desc, flags); + } + ++int __irq_get_irqchip_state(struct irq_data *data, enum irqchip_irq_state which, ++ bool *state) ++{ ++ struct irq_chip *chip; ++ int err = -EINVAL; ++ ++ do { ++ chip = irq_data_get_irq_chip(data); ++ if (chip->irq_get_irqchip_state) ++ break; ++#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY ++ data = data->parent_data; ++#else ++ data = NULL; ++#endif ++ } while (data); ++ ++ if (data) ++ err = chip->irq_get_irqchip_state(data, which, state); ++ return err; ++} ++ + /** + * irq_get_irqchip_state - returns the irqchip state of a interrupt. + * @irq: Interrupt line that is forwarded to a VM +@@ -2596,7 +2657,6 @@ int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which, + { + struct irq_desc *desc; + struct irq_data *data; +- struct irq_chip *chip; + unsigned long flags; + int err = -EINVAL; + +@@ -2606,19 +2666,7 @@ int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which, + + data = irq_desc_get_irq_data(desc); + +- do { +- chip = irq_data_get_irq_chip(data); +- if (chip->irq_get_irqchip_state) +- break; +-#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY +- data = data->parent_data; +-#else +- data = NULL; +-#endif +- } while (data); +- +- if (data) +- err = chip->irq_get_irqchip_state(data, which, state); ++ err = __irq_get_irqchip_state(data, which, state); + + irq_put_desc_busunlock(desc, flags); + return err; +diff --git a/mm/oom_kill.c b/mm/oom_kill.c +index 3a2484884cfd..263efad6fc7e 100644 +--- a/mm/oom_kill.c ++++ b/mm/oom_kill.c +@@ -985,8 +985,7 @@ static void oom_kill_process(struct oom_control *oc, const char *message) + /* + * Determines whether the kernel must panic because of the panic_on_oom sysctl. + */ +-static void check_panic_on_oom(struct oom_control *oc, +- enum oom_constraint constraint) ++static void check_panic_on_oom(struct oom_control *oc) + { + if (likely(!sysctl_panic_on_oom)) + return; +@@ -996,7 +995,7 @@ static void check_panic_on_oom(struct oom_control *oc, + * does not panic for cpuset, mempolicy, or memcg allocation + * failures. + */ +- if (constraint != CONSTRAINT_NONE) ++ if (oc->constraint != CONSTRAINT_NONE) + return; + } + /* Do not panic for oom kills triggered by sysrq */ +@@ -1033,7 +1032,6 @@ EXPORT_SYMBOL_GPL(unregister_oom_notifier); + bool out_of_memory(struct oom_control *oc) + { + unsigned long freed = 0; +- enum oom_constraint constraint = CONSTRAINT_NONE; + + if (oom_killer_disabled) + return false; +@@ -1069,10 +1067,10 @@ bool out_of_memory(struct oom_control *oc) + * Check if there were limitations on the allocation (only relevant for + * NUMA and memcg) that may require different handling. + */ +- constraint = constrained_alloc(oc); +- if (constraint != CONSTRAINT_MEMORY_POLICY) ++ oc->constraint = constrained_alloc(oc); ++ if (oc->constraint != CONSTRAINT_MEMORY_POLICY) + oc->nodemask = NULL; +- check_panic_on_oom(oc, constraint); ++ check_panic_on_oom(oc); + + if (!is_memcg_oom(oc) && sysctl_oom_kill_allocating_task && + current->mm && !oom_unkillable_task(current, NULL, oc->nodemask) && +diff --git a/tools/testing/selftests/powerpc/mm/.gitignore b/tools/testing/selftests/powerpc/mm/.gitignore +index ba919308fe30..d503b8764a8e 100644 +--- a/tools/testing/selftests/powerpc/mm/.gitignore ++++ b/tools/testing/selftests/powerpc/mm/.gitignore +@@ -3,4 +3,5 @@ subpage_prot + tempfile + prot_sao + segv_errors +-wild_bctr +\ No newline at end of file ++wild_bctr ++large_vm_fork_separation +\ No newline at end of file +diff --git a/tools/testing/selftests/powerpc/mm/Makefile b/tools/testing/selftests/powerpc/mm/Makefile +index 43d68420e363..f1fbc15800c4 100644 +--- a/tools/testing/selftests/powerpc/mm/Makefile ++++ b/tools/testing/selftests/powerpc/mm/Makefile +@@ -2,7 +2,8 @@ + noarg: + $(MAKE) -C ../ + +-TEST_GEN_PROGS := hugetlb_vs_thp_test subpage_prot prot_sao segv_errors wild_bctr ++TEST_GEN_PROGS := hugetlb_vs_thp_test subpage_prot prot_sao segv_errors wild_bctr \ ++ large_vm_fork_separation + TEST_GEN_FILES := tempfile + + top_srcdir = ../../../../.. +@@ -13,6 +14,7 @@ $(TEST_GEN_PROGS): ../harness.c + $(OUTPUT)/prot_sao: ../utils.c + + $(OUTPUT)/wild_bctr: CFLAGS += -m64 ++$(OUTPUT)/large_vm_fork_separation: CFLAGS += -m64 + + $(OUTPUT)/tempfile: + dd if=/dev/zero of=$@ bs=64k count=1 +diff --git a/tools/testing/selftests/powerpc/mm/large_vm_fork_separation.c b/tools/testing/selftests/powerpc/mm/large_vm_fork_separation.c +new file mode 100644 +index 000000000000..2363a7f3ab0d +--- /dev/null ++++ b/tools/testing/selftests/powerpc/mm/large_vm_fork_separation.c +@@ -0,0 +1,87 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++// ++// Copyright 2019, Michael Ellerman, IBM Corp. ++// ++// Test that allocating memory beyond the memory limit and then forking is ++// handled correctly, ie. the child is able to access the mappings beyond the ++// memory limit and the child's writes are not visible to the parent. ++ ++#include <stdio.h> ++#include <stdlib.h> ++#include <sys/mman.h> ++#include <sys/types.h> ++#include <sys/wait.h> ++#include <unistd.h> ++ ++#include "utils.h" ++ ++ ++#ifndef MAP_FIXED_NOREPLACE ++#define MAP_FIXED_NOREPLACE MAP_FIXED // "Should be safe" above 512TB ++#endif ++ ++ ++static int test(void) ++{ ++ int p2c[2], c2p[2], rc, status, c, *p; ++ unsigned long page_size; ++ pid_t pid; ++ ++ page_size = sysconf(_SC_PAGESIZE); ++ SKIP_IF(page_size != 65536); ++ ++ // Create a mapping at 512TB to allocate an extended_id ++ p = mmap((void *)(512ul << 40), page_size, PROT_READ | PROT_WRITE, ++ MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED_NOREPLACE, -1, 0); ++ if (p == MAP_FAILED) { ++ perror("mmap"); ++ printf("Error: couldn't mmap(), confirm kernel has 4TB support?\n"); ++ return 1; ++ } ++ ++ printf("parent writing %p = 1\n", p); ++ *p = 1; ++ ++ FAIL_IF(pipe(p2c) == -1 || pipe(c2p) == -1); ++ ++ pid = fork(); ++ if (pid == 0) { ++ FAIL_IF(read(p2c[0], &c, 1) != 1); ++ ++ pid = getpid(); ++ printf("child writing %p = %d\n", p, pid); ++ *p = pid; ++ ++ FAIL_IF(write(c2p[1], &c, 1) != 1); ++ FAIL_IF(read(p2c[0], &c, 1) != 1); ++ exit(0); ++ } ++ ++ c = 0; ++ FAIL_IF(write(p2c[1], &c, 1) != 1); ++ FAIL_IF(read(c2p[0], &c, 1) != 1); ++ ++ // Prevent compiler optimisation ++ barrier(); ++ ++ rc = 0; ++ printf("parent reading %p = %d\n", p, *p); ++ if (*p != 1) { ++ printf("Error: BUG! parent saw child's write! *p = %d\n", *p); ++ rc = 1; ++ } ++ ++ FAIL_IF(write(p2c[1], &c, 1) != 1); ++ FAIL_IF(waitpid(pid, &status, 0) == -1); ++ FAIL_IF(!WIFEXITED(status) || WEXITSTATUS(status)); ++ ++ if (rc == 0) ++ printf("success: test completed OK\n"); ++ ++ return rc; ++} ++ ++int main(void) ++{ ++ return test_harness(test, "large_vm_fork_separation"); ++}
