[gentoo-commits] repo/proj/guru:master commit in: sci-electronics/verilator/

[Andrew Ammerlaan]

commit:     eb6f3704b14ff8a2dd909ffd406887e605bbd3af
Author:     Huang Rui <vowstar <AT> gmail <DOT> com>
AuthorDate: Tue Apr  7 08:01:32 2020 +0000
Commit:     Andrew Ammerlaan <andrewammerlaan <AT> riseup <DOT> net>
CommitDate: Tue Apr  7 08:01:33 2020 +0000
URL:        https://gitweb.gentoo.org/repo/proj/guru.git/commit/?id=eb6f3704

sci-electronics/verilator: add upstream to metadata.xml

Add github remote-id verilator/verilator

Package-Manager: Portage-2.3.96, Repoman-2.3.22
Signed-off-by: Huang Rui <vowstar <AT> gmail.com>

 sci-electronics/verilator/metadata.xml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/sci-electronics/verilator/metadata.xml 
b/sci-electronics/verilator/metadata.xml
index 626ddc8..7756cca 100644
--- a/sci-electronics/verilator/metadata.xml
+++ b/sci-electronics/verilator/metadata.xml
@@ -5,6 +5,9 @@
                <email>vows...@gmail.com</email>
                <name>Huang Rui</name>
        </maintainer>
+       <upstream>
+               <remote-id type="github">verilator/verilator</remote-id>
+       </upstream>
        <longdescription>
        Verilator, the fastest free Verilog HDL simulator.
        Accepts synthesizable Verilog or SystemVerilog