commit: d80430cfa3071a7521e381837d61cd46a8d0e86b
Author: Alessandro Barbieri <lssndrbarbieri <AT> gmail <DOT> com>
AuthorDate: Sun Apr 26 22:32:19 2020 +0000
Commit: Andrew Ammerlaan <andrewammerlaan <AT> riseup <DOT> net>
CommitDate: Sun Apr 26 22:39:13 2020 +0000
URL: https://gitweb.gentoo.org/repo/proj/guru.git/commit/?id=d80430cf
sci-electronics/verilator: longdescription lang="en"
Package-Manager: Portage-2.3.99, Repoman-2.3.22
Signed-off-by: Alessandro Barbieri <lssndrbarbieri <AT> gmail.com>
sci-electronics/verilator/metadata.xml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sci-electronics/verilator/metadata.xml
b/sci-electronics/verilator/metadata.xml
index 7756cca..e5c2a24 100644
--- a/sci-electronics/verilator/metadata.xml
+++ b/sci-electronics/verilator/metadata.xml
@@ -8,7 +8,7 @@
<upstream>
<remote-id type="github">verilator/verilator</remote-id>
</upstream>
- <longdescription>
+ <longdescription lang="en">
Verilator, the fastest free Verilog HDL simulator.
Accepts synthesizable Verilog or SystemVerilog
Performs lint code-quality checks