commit: fde0139c2d8b688855e43107f6261c6f41665250 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> AuthorDate: Sat Jul 2 16:08:48 2022 +0000 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> CommitDate: Sat Jul 2 16:08:48 2022 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=fde0139c
Linux 5.4.203 Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> 0000_README | 4 + 1202_linux-5.4.203.patch | 1378 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 1382 insertions(+) diff --git a/0000_README b/0000_README index 17c1b728..30146068 100644 --- a/0000_README +++ b/0000_README @@ -851,6 +851,10 @@ Patch: 1201_linux-5.4.202.patch From: http://www.kernel.org Desc: Linux 5.4.202 +Patch: 1202_linux-5.4.203.patch +From: http://www.kernel.org +Desc: Linux 5.4.203 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1202_linux-5.4.203.patch b/1202_linux-5.4.203.patch new file mode 100644 index 00000000..d413ebee --- /dev/null +++ b/1202_linux-5.4.203.patch @@ -0,0 +1,1378 @@ +diff --git a/Makefile b/Makefile +index 021878dc23f9b..86f518e49c333 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + VERSION = 5 + PATCHLEVEL = 4 +-SUBLEVEL = 202 ++SUBLEVEL = 203 + EXTRAVERSION = + NAME = Kleptomaniac Octopus + +diff --git a/arch/arm/boot/bootp/init.S b/arch/arm/boot/bootp/init.S +index 5c476bd2b4ce9..b562da2f70408 100644 +--- a/arch/arm/boot/bootp/init.S ++++ b/arch/arm/boot/bootp/init.S +@@ -13,7 +13,7 @@ + * size immediately following the kernel, we could build this into + * a binary blob, and concatenate the zImage using the cat command. + */ +- .section .start,#alloc,#execinstr ++ .section .start, "ax" + .type _start, #function + .globl _start + +diff --git a/arch/arm/boot/compressed/big-endian.S b/arch/arm/boot/compressed/big-endian.S +index 88e2a88d324b2..0e092c36da2f2 100644 +--- a/arch/arm/boot/compressed/big-endian.S ++++ b/arch/arm/boot/compressed/big-endian.S +@@ -6,7 +6,7 @@ + * Author: Nicolas Pitre + */ + +- .section ".start", #alloc, #execinstr ++ .section ".start", "ax" + + mrc p15, 0, r0, c1, c0, 0 @ read control reg + orr r0, r0, #(1 << 7) @ enable big endian mode +diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S +index 0a2410adc25b3..17f87f4c74f51 100644 +--- a/arch/arm/boot/compressed/head.S ++++ b/arch/arm/boot/compressed/head.S +@@ -140,7 +140,7 @@ + #endif + .endm + +- .section ".start", #alloc, #execinstr ++ .section ".start", "ax" + /* + * sort out different calling conventions + */ +@@ -1274,7 +1274,7 @@ iflush: + __armv5tej_mmu_cache_flush: + tst r4, #1 + movne pc, lr +-1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache ++1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate D cache + bne 1b + mcr p15, 0, r0, c7, c5, 0 @ flush I cache + mcr p15, 0, r0, c7, c10, 4 @ drain WB +diff --git a/arch/arm/boot/compressed/piggy.S b/arch/arm/boot/compressed/piggy.S +index 0284f84dcf380..27577644ee721 100644 +--- a/arch/arm/boot/compressed/piggy.S ++++ b/arch/arm/boot/compressed/piggy.S +@@ -1,5 +1,5 @@ + /* SPDX-License-Identifier: GPL-2.0 */ +- .section .piggydata,#alloc ++ .section .piggydata, "a" + .globl input_data + input_data: + .incbin "arch/arm/boot/compressed/piggy_data" +diff --git a/arch/arm/crypto/Kconfig b/arch/arm/crypto/Kconfig +index 043b0b18bf7e0..f747caea10ffa 100644 +--- a/arch/arm/crypto/Kconfig ++++ b/arch/arm/crypto/Kconfig +@@ -30,7 +30,7 @@ config CRYPTO_SHA1_ARM_NEON + + config CRYPTO_SHA1_ARM_CE + tristate "SHA1 digest algorithm (ARM v8 Crypto Extensions)" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && (CC_IS_CLANG || GCC_VERSION >= 40800) + select CRYPTO_SHA1_ARM + select CRYPTO_HASH + help +@@ -39,7 +39,7 @@ config CRYPTO_SHA1_ARM_CE + + config CRYPTO_SHA2_ARM_CE + tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && (CC_IS_CLANG || GCC_VERSION >= 40800) + select CRYPTO_SHA256_ARM + select CRYPTO_HASH + help +@@ -96,7 +96,7 @@ config CRYPTO_AES_ARM_BS + + config CRYPTO_AES_ARM_CE + tristate "Accelerated AES using ARMv8 Crypto Extensions" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && (CC_IS_CLANG || GCC_VERSION >= 40800) + select CRYPTO_BLKCIPHER + select CRYPTO_LIB_AES + select CRYPTO_SIMD +@@ -106,7 +106,7 @@ config CRYPTO_AES_ARM_CE + + config CRYPTO_GHASH_ARM_CE + tristate "PMULL-accelerated GHASH using NEON/ARMv8 Crypto Extensions" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && (CC_IS_CLANG || GCC_VERSION >= 40800) + select CRYPTO_HASH + select CRYPTO_CRYPTD + select CRYPTO_GF128MUL +@@ -118,12 +118,14 @@ config CRYPTO_GHASH_ARM_CE + + config CRYPTO_CRCT10DIF_ARM_CE + tristate "CRCT10DIF digest algorithm using PMULL instructions" +- depends on KERNEL_MODE_NEON && CRC_T10DIF ++ depends on KERNEL_MODE_NEON && (CC_IS_CLANG || GCC_VERSION >= 40800) ++ depends on CRC_T10DIF + select CRYPTO_HASH + + config CRYPTO_CRC32_ARM_CE + tristate "CRC32(C) digest algorithm using CRC and/or PMULL instructions" +- depends on KERNEL_MODE_NEON && CRC32 ++ depends on KERNEL_MODE_NEON && (CC_IS_CLANG || GCC_VERSION >= 40800) ++ depends on CRC32 + select CRYPTO_HASH + + config CRYPTO_CHACHA20_NEON +diff --git a/arch/arm/crypto/Makefile b/arch/arm/crypto/Makefile +index 4180f3a13512c..c0d36771a6934 100644 +--- a/arch/arm/crypto/Makefile ++++ b/arch/arm/crypto/Makefile +@@ -12,32 +12,12 @@ obj-$(CONFIG_CRYPTO_SHA512_ARM) += sha512-arm.o + obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o + obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o + +-ce-obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o +-ce-obj-$(CONFIG_CRYPTO_SHA1_ARM_CE) += sha1-arm-ce.o +-ce-obj-$(CONFIG_CRYPTO_SHA2_ARM_CE) += sha2-arm-ce.o +-ce-obj-$(CONFIG_CRYPTO_GHASH_ARM_CE) += ghash-arm-ce.o +-ce-obj-$(CONFIG_CRYPTO_CRCT10DIF_ARM_CE) += crct10dif-arm-ce.o +-crc-obj-$(CONFIG_CRYPTO_CRC32_ARM_CE) += crc32-arm-ce.o +- +-ifneq ($(crc-obj-y)$(crc-obj-m),) +-ifeq ($(call as-instr,.arch armv8-a\n.arch_extension crc,y,n),y) +-ce-obj-y += $(crc-obj-y) +-ce-obj-m += $(crc-obj-m) +-else +-$(warning These CRC Extensions modules need binutils 2.23 or higher) +-$(warning $(crc-obj-y) $(crc-obj-m)) +-endif +-endif +- +-ifneq ($(ce-obj-y)$(ce-obj-m),) +-ifeq ($(call as-instr,.fpu crypto-neon-fp-armv8,y,n),y) +-obj-y += $(ce-obj-y) +-obj-m += $(ce-obj-m) +-else +-$(warning These ARMv8 Crypto Extensions modules need binutils 2.23 or higher) +-$(warning $(ce-obj-y) $(ce-obj-m)) +-endif +-endif ++obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o ++obj-$(CONFIG_CRYPTO_SHA1_ARM_CE) += sha1-arm-ce.o ++obj-$(CONFIG_CRYPTO_SHA2_ARM_CE) += sha2-arm-ce.o ++obj-$(CONFIG_CRYPTO_GHASH_ARM_CE) += ghash-arm-ce.o ++obj-$(CONFIG_CRYPTO_CRCT10DIF_ARM_CE) += crct10dif-arm-ce.o ++obj-$(CONFIG_CRYPTO_CRC32_ARM_CE) += crc32-arm-ce.o + + aes-arm-y := aes-cipher-core.o aes-cipher-glue.o + aes-arm-bs-y := aes-neonbs-core.o aes-neonbs-glue.o +diff --git a/arch/arm/crypto/crct10dif-ce-core.S b/arch/arm/crypto/crct10dif-ce-core.S +index 86be258a803fa..46c02c518a300 100644 +--- a/arch/arm/crypto/crct10dif-ce-core.S ++++ b/arch/arm/crypto/crct10dif-ce-core.S +@@ -72,7 +72,7 @@ + #endif + + .text +- .arch armv7-a ++ .arch armv8-a + .fpu crypto-neon-fp-armv8 + + init_crc .req r0 +diff --git a/arch/arm/crypto/ghash-ce-core.S b/arch/arm/crypto/ghash-ce-core.S +index c47fe81abcb01..9f51e3fa45268 100644 +--- a/arch/arm/crypto/ghash-ce-core.S ++++ b/arch/arm/crypto/ghash-ce-core.S +@@ -8,6 +8,9 @@ + #include <linux/linkage.h> + #include <asm/assembler.h> + ++ .arch armv8-a ++ .fpu crypto-neon-fp-armv8 ++ + SHASH .req q0 + T1 .req q1 + XL .req q2 +@@ -88,7 +91,6 @@ + T3_H .req d17 + + .text +- .fpu crypto-neon-fp-armv8 + + .macro __pmull_p64, rd, rn, rm, b1, b2, b3, b4 + vmull.p64 \rd, \rn, \rm +diff --git a/arch/arm/crypto/sha1-ce-core.S b/arch/arm/crypto/sha1-ce-core.S +index 49a74a441aec7..8a702e051738a 100644 +--- a/arch/arm/crypto/sha1-ce-core.S ++++ b/arch/arm/crypto/sha1-ce-core.S +@@ -10,6 +10,7 @@ + #include <asm/assembler.h> + + .text ++ .arch armv8-a + .fpu crypto-neon-fp-armv8 + + k0 .req q0 +diff --git a/arch/arm/crypto/sha2-ce-core.S b/arch/arm/crypto/sha2-ce-core.S +index 4ad517577e230..b6369d2440a19 100644 +--- a/arch/arm/crypto/sha2-ce-core.S ++++ b/arch/arm/crypto/sha2-ce-core.S +@@ -10,6 +10,7 @@ + #include <asm/assembler.h> + + .text ++ .arch armv8-a + .fpu crypto-neon-fp-armv8 + + k0 .req q7 +diff --git a/arch/arm/crypto/sha256-armv4.pl b/arch/arm/crypto/sha256-armv4.pl +index a03cf4dfb7818..d927483985c2d 100644 +--- a/arch/arm/crypto/sha256-armv4.pl ++++ b/arch/arm/crypto/sha256-armv4.pl +@@ -175,7 +175,6 @@ $code=<<___; + #else + .syntax unified + # ifdef __thumb2__ +-# define adrl adr + .thumb + # else + .code 32 +@@ -471,7 +470,8 @@ sha256_block_data_order_neon: + stmdb sp!,{r4-r12,lr} + + sub $H,sp,#16*4+16 +- adrl $Ktbl,K256 ++ adr $Ktbl,.Lsha256_block_data_order ++ sub $Ktbl,$Ktbl,#.Lsha256_block_data_order-K256 + bic $H,$H,#15 @ align for 128-bit stores + mov $t2,sp + mov sp,$H @ alloca +diff --git a/arch/arm/crypto/sha256-core.S_shipped b/arch/arm/crypto/sha256-core.S_shipped +index 054aae0edfce5..9deb515f3c9f2 100644 +--- a/arch/arm/crypto/sha256-core.S_shipped ++++ b/arch/arm/crypto/sha256-core.S_shipped +@@ -56,7 +56,6 @@ + #else + .syntax unified + # ifdef __thumb2__ +-# define adrl adr + .thumb + # else + .code 32 +@@ -1885,7 +1884,8 @@ sha256_block_data_order_neon: + stmdb sp!,{r4-r12,lr} + + sub r11,sp,#16*4+16 +- adrl r14,K256 ++ adr r14,.Lsha256_block_data_order ++ sub r14,r14,#.Lsha256_block_data_order-K256 + bic r11,r11,#15 @ align for 128-bit stores + mov r12,sp + mov sp,r11 @ alloca +diff --git a/arch/arm/crypto/sha512-armv4.pl b/arch/arm/crypto/sha512-armv4.pl +index 788c17b56ecce..2a0bdf7dd87c3 100644 +--- a/arch/arm/crypto/sha512-armv4.pl ++++ b/arch/arm/crypto/sha512-armv4.pl +@@ -212,7 +212,6 @@ $code=<<___; + #else + .syntax unified + # ifdef __thumb2__ +-# define adrl adr + .thumb + # else + .code 32 +@@ -602,7 +601,8 @@ sha512_block_data_order_neon: + dmb @ errata #451034 on early Cortex A8 + add $len,$inp,$len,lsl#7 @ len to point at the end of inp + VFP_ABI_PUSH +- adrl $Ktbl,K512 ++ adr $Ktbl,.Lsha512_block_data_order ++ sub $Ktbl,$Ktbl,.Lsha512_block_data_order-K512 + vldmia $ctx,{$A-$H} @ load context + .Loop_neon: + ___ +diff --git a/arch/arm/crypto/sha512-core.S_shipped b/arch/arm/crypto/sha512-core.S_shipped +index 710ea309769e7..cf5a7a70ff008 100644 +--- a/arch/arm/crypto/sha512-core.S_shipped ++++ b/arch/arm/crypto/sha512-core.S_shipped +@@ -79,7 +79,6 @@ + #else + .syntax unified + # ifdef __thumb2__ +-# define adrl adr + .thumb + # else + .code 32 +@@ -543,7 +542,8 @@ sha512_block_data_order_neon: + dmb @ errata #451034 on early Cortex A8 + add r2,r1,r2,lsl#7 @ len to point at the end of inp + VFP_ABI_PUSH +- adrl r3,K512 ++ adr r3,.Lsha512_block_data_order ++ sub r3,r3,.Lsha512_block_data_order-K512 + vldmia r0,{d16-d23} @ load context + .Loop_neon: + vshr.u64 d24,d20,#14 @ 0 +diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h +index 6b3e64e19fb6f..70e1c23feedb7 100644 +--- a/arch/arm/include/asm/assembler.h ++++ b/arch/arm/include/asm/assembler.h +@@ -279,10 +279,9 @@ + .endif ;\ + .popsection + #define ALT_UP_B(label) \ +- .equ up_b_offset, label - 9998b ;\ + .pushsection ".alt.smp.init", "a" ;\ + .long 9998b ;\ +- W(b) . + up_b_offset ;\ ++ W(b) . + (label - 9998b) ;\ + .popsection + #else + #define ALT_SMP(instr...) +diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h +index 628c336e8e3b2..947ee5395e1fb 100644 +--- a/arch/arm/include/asm/vfpmacros.h ++++ b/arch/arm/include/asm/vfpmacros.h +@@ -19,23 +19,25 @@ + + @ read all the working registers back into the VFP + .macro VFPFLDMIA, base, tmp ++ .fpu vfpv2 + #if __LINUX_ARM_ARCH__ < 6 +- LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} ++ fldmiax \base!, {d0-d15} + #else +- LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15} ++ vldmia \base!, {d0-d15} + #endif + #ifdef CONFIG_VFPv3 ++ .fpu vfpv3 + #if __LINUX_ARM_ARCH__ <= 6 + ldr \tmp, =elf_hwcap @ may not have MVFR regs + ldr \tmp, [\tmp, #0] + tst \tmp, #HWCAP_VFPD32 +- ldclne p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} ++ vldmiane \base!, {d16-d31} + addeq \base, \base, #32*4 @ step over unused register space + #else + VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 + and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field + cmp \tmp, #2 @ 32 x 64bit registers? +- ldcleq p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} ++ vldmiaeq \base!, {d16-d31} + addne \base, \base, #32*4 @ step over unused register space + #endif + #endif +@@ -44,22 +46,23 @@ + @ write all the working registers out of the VFP + .macro VFPFSTMIA, base, tmp + #if __LINUX_ARM_ARCH__ < 6 +- STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15} ++ fstmiax \base!, {d0-d15} + #else +- STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15} ++ vstmia \base!, {d0-d15} + #endif + #ifdef CONFIG_VFPv3 ++ .fpu vfpv3 + #if __LINUX_ARM_ARCH__ <= 6 + ldr \tmp, =elf_hwcap @ may not have MVFR regs + ldr \tmp, [\tmp, #0] + tst \tmp, #HWCAP_VFPD32 +- stclne p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} ++ vstmiane \base!, {d16-d31} + addeq \base, \base, #32*4 @ step over unused register space + #else + VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 + and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field + cmp \tmp, #2 @ 32 x 64bit registers? +- stcleq p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} ++ vstmiaeq \base!, {d16-d31} + addne \base, \base, #32*4 @ step over unused register space + #endif + #endif +diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S +index 0dcae787b004d..d2b4ac06e4ed8 100644 +--- a/arch/arm/kernel/iwmmxt.S ++++ b/arch/arm/kernel/iwmmxt.S +@@ -16,6 +16,7 @@ + #include <asm/thread_info.h> + #include <asm/asm-offsets.h> + #include <asm/assembler.h> ++#include "iwmmxt.h" + + #if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B) + #define PJ4(code...) code +@@ -113,33 +114,33 @@ concan_save: + + concan_dump: + +- wstrw wCSSF, [r1, #MMX_WCSSF] +- wstrw wCASF, [r1, #MMX_WCASF] +- wstrw wCGR0, [r1, #MMX_WCGR0] +- wstrw wCGR1, [r1, #MMX_WCGR1] +- wstrw wCGR2, [r1, #MMX_WCGR2] +- wstrw wCGR3, [r1, #MMX_WCGR3] ++ wstrw wCSSF, r1, MMX_WCSSF ++ wstrw wCASF, r1, MMX_WCASF ++ wstrw wCGR0, r1, MMX_WCGR0 ++ wstrw wCGR1, r1, MMX_WCGR1 ++ wstrw wCGR2, r1, MMX_WCGR2 ++ wstrw wCGR3, r1, MMX_WCGR3 + + 1: @ MUP? wRn + tst r2, #0x2 + beq 2f + +- wstrd wR0, [r1, #MMX_WR0] +- wstrd wR1, [r1, #MMX_WR1] +- wstrd wR2, [r1, #MMX_WR2] +- wstrd wR3, [r1, #MMX_WR3] +- wstrd wR4, [r1, #MMX_WR4] +- wstrd wR5, [r1, #MMX_WR5] +- wstrd wR6, [r1, #MMX_WR6] +- wstrd wR7, [r1, #MMX_WR7] +- wstrd wR8, [r1, #MMX_WR8] +- wstrd wR9, [r1, #MMX_WR9] +- wstrd wR10, [r1, #MMX_WR10] +- wstrd wR11, [r1, #MMX_WR11] +- wstrd wR12, [r1, #MMX_WR12] +- wstrd wR13, [r1, #MMX_WR13] +- wstrd wR14, [r1, #MMX_WR14] +- wstrd wR15, [r1, #MMX_WR15] ++ wstrd wR0, r1, MMX_WR0 ++ wstrd wR1, r1, MMX_WR1 ++ wstrd wR2, r1, MMX_WR2 ++ wstrd wR3, r1, MMX_WR3 ++ wstrd wR4, r1, MMX_WR4 ++ wstrd wR5, r1, MMX_WR5 ++ wstrd wR6, r1, MMX_WR6 ++ wstrd wR7, r1, MMX_WR7 ++ wstrd wR8, r1, MMX_WR8 ++ wstrd wR9, r1, MMX_WR9 ++ wstrd wR10, r1, MMX_WR10 ++ wstrd wR11, r1, MMX_WR11 ++ wstrd wR12, r1, MMX_WR12 ++ wstrd wR13, r1, MMX_WR13 ++ wstrd wR14, r1, MMX_WR14 ++ wstrd wR15, r1, MMX_WR15 + + 2: teq r0, #0 @ anything to load? + reteq lr @ if not, return +@@ -147,30 +148,30 @@ concan_dump: + concan_load: + + @ Load wRn +- wldrd wR0, [r0, #MMX_WR0] +- wldrd wR1, [r0, #MMX_WR1] +- wldrd wR2, [r0, #MMX_WR2] +- wldrd wR3, [r0, #MMX_WR3] +- wldrd wR4, [r0, #MMX_WR4] +- wldrd wR5, [r0, #MMX_WR5] +- wldrd wR6, [r0, #MMX_WR6] +- wldrd wR7, [r0, #MMX_WR7] +- wldrd wR8, [r0, #MMX_WR8] +- wldrd wR9, [r0, #MMX_WR9] +- wldrd wR10, [r0, #MMX_WR10] +- wldrd wR11, [r0, #MMX_WR11] +- wldrd wR12, [r0, #MMX_WR12] +- wldrd wR13, [r0, #MMX_WR13] +- wldrd wR14, [r0, #MMX_WR14] +- wldrd wR15, [r0, #MMX_WR15] ++ wldrd wR0, r0, MMX_WR0 ++ wldrd wR1, r0, MMX_WR1 ++ wldrd wR2, r0, MMX_WR2 ++ wldrd wR3, r0, MMX_WR3 ++ wldrd wR4, r0, MMX_WR4 ++ wldrd wR5, r0, MMX_WR5 ++ wldrd wR6, r0, MMX_WR6 ++ wldrd wR7, r0, MMX_WR7 ++ wldrd wR8, r0, MMX_WR8 ++ wldrd wR9, r0, MMX_WR9 ++ wldrd wR10, r0, MMX_WR10 ++ wldrd wR11, r0, MMX_WR11 ++ wldrd wR12, r0, MMX_WR12 ++ wldrd wR13, r0, MMX_WR13 ++ wldrd wR14, r0, MMX_WR14 ++ wldrd wR15, r0, MMX_WR15 + + @ Load wCx +- wldrw wCSSF, [r0, #MMX_WCSSF] +- wldrw wCASF, [r0, #MMX_WCASF] +- wldrw wCGR0, [r0, #MMX_WCGR0] +- wldrw wCGR1, [r0, #MMX_WCGR1] +- wldrw wCGR2, [r0, #MMX_WCGR2] +- wldrw wCGR3, [r0, #MMX_WCGR3] ++ wldrw wCSSF, r0, MMX_WCSSF ++ wldrw wCASF, r0, MMX_WCASF ++ wldrw wCGR0, r0, MMX_WCGR0 ++ wldrw wCGR1, r0, MMX_WCGR1 ++ wldrw wCGR2, r0, MMX_WCGR2 ++ wldrw wCGR3, r0, MMX_WCGR3 + + @ clear CUP/MUP (only if r1 != 0) + teq r1, #0 +diff --git a/arch/arm/kernel/iwmmxt.h b/arch/arm/kernel/iwmmxt.h +new file mode 100644 +index 0000000000000..fb627286f5bb9 +--- /dev/null ++++ b/arch/arm/kernel/iwmmxt.h +@@ -0,0 +1,47 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++ ++#ifndef __IWMMXT_H__ ++#define __IWMMXT_H__ ++ ++.irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 ++.set .LwR\b, \b ++.set .Lr\b, \b ++.endr ++ ++.set .LwCSSF, 0x2 ++.set .LwCASF, 0x3 ++.set .LwCGR0, 0x8 ++.set .LwCGR1, 0x9 ++.set .LwCGR2, 0xa ++.set .LwCGR3, 0xb ++ ++.macro wldrd, reg:req, base:req, offset:req ++.inst 0xedd00100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2) ++.endm ++ ++.macro wldrw, reg:req, base:req, offset:req ++.inst 0xfd900100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2) ++.endm ++ ++.macro wstrd, reg:req, base:req, offset:req ++.inst 0xedc00100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2) ++.endm ++ ++.macro wstrw, reg:req, base:req, offset:req ++.inst 0xfd800100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2) ++.endm ++ ++#ifdef __clang__ ++ ++#define wCon c1 ++ ++.macro tmrc, dest:req, control:req ++mrc p1, 0, \dest, \control, c0, 0 ++.endm ++ ++.macro tmcr, control:req, src:req ++mcr p1, 0, \src, \control, c0, 0 ++.endm ++#endif ++ ++#endif +diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S +index ac1324c6453b5..c4e97d35c310d 100644 +--- a/arch/arm/mach-omap2/sleep34xx.S ++++ b/arch/arm/mach-omap2/sleep34xx.S +@@ -72,7 +72,7 @@ ENTRY(enable_omap3630_toggle_l2_on_restore) + stmfd sp!, {lr} @ save registers on stack + /* Setup so that we will disable and enable l2 */ + mov r1, #0x1 +- adrl r3, l2dis_3630_offset @ may be too distant for plain adr ++ adr r3, l2dis_3630_offset + ldr r2, [r3] @ value for offset + str r1, [r2, r3] @ write to l2dis_3630 + ldmfd sp!, {pc} @ restore regs and return +diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S +index 4fa5371bc6624..2785da387c910 100644 +--- a/arch/arm/mm/proc-arm1020.S ++++ b/arch/arm/mm/proc-arm1020.S +@@ -491,7 +491,7 @@ cpu_arm1020_name: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __arm1020_proc_info,#object + __arm1020_proc_info: +diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S +index 5d8a8339e09a4..e9ea237ed7852 100644 +--- a/arch/arm/mm/proc-arm1020e.S ++++ b/arch/arm/mm/proc-arm1020e.S +@@ -449,7 +449,7 @@ arm1020e_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __arm1020e_proc_info,#object + __arm1020e_proc_info: +diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S +index b3dd95c345e48..920c279e7879d 100644 +--- a/arch/arm/mm/proc-arm1022.S ++++ b/arch/arm/mm/proc-arm1022.S +@@ -443,7 +443,7 @@ arm1022_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __arm1022_proc_info,#object + __arm1022_proc_info: +diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S +index ac5afde12f35c..0bdf25a95b107 100644 +--- a/arch/arm/mm/proc-arm1026.S ++++ b/arch/arm/mm/proc-arm1026.S +@@ -138,7 +138,7 @@ ENTRY(arm1026_flush_kern_cache_all) + mov ip, #0 + __flush_whole_cache: + #ifndef CONFIG_CPU_DCACHE_DISABLE +-1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate ++1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test, clean, invalidate + bne 1b + #endif + tst r2, #VM_EXEC +@@ -363,7 +363,7 @@ ENTRY(cpu_arm1026_switch_mm) + #ifdef CONFIG_MMU + mov r1, #0 + #ifndef CONFIG_CPU_DCACHE_DISABLE +-1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate ++1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test, clean, invalidate + bne 1b + #endif + #ifndef CONFIG_CPU_ICACHE_DISABLE +@@ -437,7 +437,7 @@ arm1026_crval: + string cpu_arm1026_name, "ARM1026EJ-S" + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __arm1026_proc_info,#object + __arm1026_proc_info: +diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S +index c99d24363f32e..39361e196d61b 100644 +--- a/arch/arm/mm/proc-arm720.S ++++ b/arch/arm/mm/proc-arm720.S +@@ -172,7 +172,7 @@ arm720_crval: + * See <asm/procinfo.h> for a definition of this structure. + */ + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .macro arm720_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cpu_flush:req + .type __\name\()_proc_info,#object +diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S +index 1b4a3838393fb..1a94bbf6e53fc 100644 +--- a/arch/arm/mm/proc-arm740.S ++++ b/arch/arm/mm/proc-arm740.S +@@ -128,7 +128,7 @@ __arm740_setup: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + .type __arm740_proc_info,#object + __arm740_proc_info: + .long 0x41807400 +diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S +index 17a4687065c7f..52b66cf0259e3 100644 +--- a/arch/arm/mm/proc-arm7tdmi.S ++++ b/arch/arm/mm/proc-arm7tdmi.S +@@ -72,7 +72,7 @@ __arm7tdmi_setup: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .macro arm7tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, \ + extra_hwcaps=0 +diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S +index 298c76b47749f..31ac8acc34dc5 100644 +--- a/arch/arm/mm/proc-arm920.S ++++ b/arch/arm/mm/proc-arm920.S +@@ -434,7 +434,7 @@ arm920_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __arm920_proc_info,#object + __arm920_proc_info: +diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S +index 824be3a0bc238..ca2c7ca8af214 100644 +--- a/arch/arm/mm/proc-arm922.S ++++ b/arch/arm/mm/proc-arm922.S +@@ -412,7 +412,7 @@ arm922_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __arm922_proc_info,#object + __arm922_proc_info: +diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S +index d40cff8f102c2..a381a0c9f1092 100644 +--- a/arch/arm/mm/proc-arm925.S ++++ b/arch/arm/mm/proc-arm925.S +@@ -477,7 +477,7 @@ arm925_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .macro arm925_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache + .type __\name\()_proc_info,#object +diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S +index f3cd08f353f00..1ba253c2bce19 100644 +--- a/arch/arm/mm/proc-arm926.S ++++ b/arch/arm/mm/proc-arm926.S +@@ -131,7 +131,7 @@ __flush_whole_cache: + #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH + mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache + #else +-1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate ++1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate + bne 1b + #endif + tst r2, #VM_EXEC +@@ -358,7 +358,7 @@ ENTRY(cpu_arm926_switch_mm) + mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache + #else + @ && 'Clean & Invalidate whole DCache' +-1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate ++1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate + bne 1b + #endif + mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache +@@ -460,7 +460,7 @@ arm926_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __arm926_proc_info,#object + __arm926_proc_info: +diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S +index 1c26d991386d7..4b8a00220cc97 100644 +--- a/arch/arm/mm/proc-arm940.S ++++ b/arch/arm/mm/proc-arm940.S +@@ -340,7 +340,7 @@ __arm940_setup: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __arm940_proc_info,#object + __arm940_proc_info: +diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S +index 2dc1c75a4fd4a..555becf9c758d 100644 +--- a/arch/arm/mm/proc-arm946.S ++++ b/arch/arm/mm/proc-arm946.S +@@ -395,7 +395,7 @@ __arm946_setup: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + .type __arm946_proc_info,#object + __arm946_proc_info: + .long 0x41009460 +diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S +index 913c06e590af5..ef517530130b0 100644 +--- a/arch/arm/mm/proc-arm9tdmi.S ++++ b/arch/arm/mm/proc-arm9tdmi.S +@@ -66,7 +66,7 @@ __arm9tdmi_setup: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .macro arm9tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req + .type __\name\()_proc_info, #object +diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S +index 8120b6f4dbb83..dddf833fe0007 100644 +--- a/arch/arm/mm/proc-fa526.S ++++ b/arch/arm/mm/proc-fa526.S +@@ -185,7 +185,7 @@ fa526_cr1_set: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __fa526_proc_info,#object + __fa526_proc_info: +diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S +index bb6dc34d42a37..b12b76bc8d30c 100644 +--- a/arch/arm/mm/proc-feroceon.S ++++ b/arch/arm/mm/proc-feroceon.S +@@ -571,7 +571,7 @@ feroceon_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .macro feroceon_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache:req + .type __\name\()_proc_info,#object +diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S +index f083085788857..d47d6c5cee63a 100644 +--- a/arch/arm/mm/proc-mohawk.S ++++ b/arch/arm/mm/proc-mohawk.S +@@ -416,7 +416,7 @@ mohawk_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __88sv331x_proc_info,#object + __88sv331x_proc_info: +diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S +index d5bc5d7025639..baba503ba8166 100644 +--- a/arch/arm/mm/proc-sa110.S ++++ b/arch/arm/mm/proc-sa110.S +@@ -196,7 +196,7 @@ sa110_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .type __sa110_proc_info,#object + __sa110_proc_info: +diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S +index be7b611c76c76..75ebacc8e4e5c 100644 +--- a/arch/arm/mm/proc-sa1100.S ++++ b/arch/arm/mm/proc-sa1100.S +@@ -239,7 +239,7 @@ sa1100_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .macro sa1100_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req + .type __\name\()_proc_info,#object +diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S +index c1c85eb3484f3..1dd0d5ca27da8 100644 +--- a/arch/arm/mm/proc-v6.S ++++ b/arch/arm/mm/proc-v6.S +@@ -261,7 +261,7 @@ v6_crval: + string cpu_elf_name, "v6" + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + /* + * Match any ARMv6 processor core. +diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S +index c4e8006a1a8cd..48e0ef6f0dccf 100644 +--- a/arch/arm/mm/proc-v7.S ++++ b/arch/arm/mm/proc-v7.S +@@ -644,7 +644,7 @@ __v7_setup_stack: + string cpu_elf_name, "v7" + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + /* + * Standard v7 proc info content +diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S +index 1a49d503eafc8..84459c1d31b87 100644 +--- a/arch/arm/mm/proc-v7m.S ++++ b/arch/arm/mm/proc-v7m.S +@@ -93,7 +93,7 @@ ENTRY(cpu_cm7_proc_fin) + ret lr + ENDPROC(cpu_cm7_proc_fin) + +- .section ".init.text", #alloc, #execinstr ++ .section ".init.text", "ax" + + __v7m_cm7_setup: + mov r8, #(V7M_SCB_CCR_DC | V7M_SCB_CCR_IC| V7M_SCB_CCR_BP) +@@ -177,7 +177,7 @@ ENDPROC(__v7m_setup) + string cpu_elf_name "v7m" + string cpu_v7m_name "ARMv7-M" + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .macro __v7m_proc name, initfunc, cache_fns = nop_cache_fns, hwcaps = 0, proc_fns = v7m_processor_functions + .long 0 /* proc_info_list.__cpu_mm_mmu_flags */ +diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S +index 1ac0fbbe9f127..42eaecc43cfef 100644 +--- a/arch/arm/mm/proc-xsc3.S ++++ b/arch/arm/mm/proc-xsc3.S +@@ -496,7 +496,7 @@ xsc3_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .macro xsc3_proc_info name:req, cpu_val:req, cpu_mask:req + .type __\name\()_proc_info,#object +diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S +index bdb2b7749b039..18ac5a1f89225 100644 +--- a/arch/arm/mm/proc-xscale.S ++++ b/arch/arm/mm/proc-xscale.S +@@ -610,7 +610,7 @@ xscale_crval: + + .align + +- .section ".proc.info.init", #alloc ++ .section ".proc.info.init", "a" + + .macro xscale_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache + .type __\name\()_proc_info,#object +diff --git a/arch/arm/vfp/Makefile b/arch/arm/vfp/Makefile +index 9975b63ac3b0d..749901a72d6dc 100644 +--- a/arch/arm/vfp/Makefile ++++ b/arch/arm/vfp/Makefile +@@ -8,6 +8,4 @@ + # ccflags-y := -DDEBUG + # asflags-y := -DDEBUG + +-KBUILD_AFLAGS :=$(KBUILD_AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp -mfloat-abi=soft) +- + obj-y += vfpmodule.o entry.o vfphw.o vfpsingle.o vfpdouble.o +diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S +index b530db8f2c6c8..772c6a3b1f724 100644 +--- a/arch/arm/vfp/vfphw.S ++++ b/arch/arm/vfp/vfphw.S +@@ -253,11 +253,14 @@ vfp_current_hw_state_address: + + ENTRY(vfp_get_float) + tbl_branch r0, r3, #3 ++ .fpu vfpv2 + .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 +-1: mrc p10, 0, r0, c\dr, c0, 0 @ fmrs r0, s0 ++1: vmov r0, s\dr + ret lr + .org 1b + 8 +-1: mrc p10, 0, r0, c\dr, c0, 4 @ fmrs r0, s1 ++ .endr ++ .irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 ++1: vmov r0, s\dr + ret lr + .org 1b + 8 + .endr +@@ -265,11 +268,14 @@ ENDPROC(vfp_get_float) + + ENTRY(vfp_put_float) + tbl_branch r1, r3, #3 ++ .fpu vfpv2 + .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 +-1: mcr p10, 0, r0, c\dr, c0, 0 @ fmsr r0, s0 ++1: vmov s\dr, r0 + ret lr + .org 1b + 8 +-1: mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1 ++ .endr ++ .irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 ++1: vmov s\dr, r0 + ret lr + .org 1b + 8 + .endr +@@ -277,15 +283,17 @@ ENDPROC(vfp_put_float) + + ENTRY(vfp_get_double) + tbl_branch r0, r3, #3 ++ .fpu vfpv2 + .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 +-1: fmrrd r0, r1, d\dr ++1: vmov r0, r1, d\dr + ret lr + .org 1b + 8 + .endr + #ifdef CONFIG_VFPv3 + @ d16 - d31 registers +- .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 +-1: mrrc p11, 3, r0, r1, c\dr @ fmrrd r0, r1, d\dr ++ .fpu vfpv3 ++ .irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 ++1: vmov r0, r1, d\dr + ret lr + .org 1b + 8 + .endr +@@ -299,15 +307,17 @@ ENDPROC(vfp_get_double) + + ENTRY(vfp_put_double) + tbl_branch r2, r3, #3 ++ .fpu vfpv2 + .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 +-1: fmdrr d\dr, r0, r1 ++1: vmov d\dr, r0, r1 + ret lr + .org 1b + 8 + .endr + #ifdef CONFIG_VFPv3 ++ .fpu vfpv3 + @ d16 - d31 registers +- .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 +-1: mcrr p11, 3, r0, r1, c\dr @ fmdrr r0, r1, d\dr ++ .irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 ++1: vmov d\dr, r0, r1 + ret lr + .org 1b + 8 + .endr +diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h +index f54a08a2cd709..017336f2b0864 100644 +--- a/arch/powerpc/include/asm/ftrace.h ++++ b/arch/powerpc/include/asm/ftrace.h +@@ -96,7 +96,7 @@ static inline bool arch_syscall_match_sym_name(const char *sym, const char *name + #endif /* PPC64_ELF_ABI_v1 */ + #endif /* CONFIG_FTRACE_SYSCALLS */ + +-#ifdef CONFIG_PPC64 ++#if defined(CONFIG_PPC64) && defined(CONFIG_FUNCTION_TRACER) + #include <asm/paca.h> + + static inline void this_cpu_disable_ftrace(void) +@@ -108,9 +108,12 @@ static inline void this_cpu_enable_ftrace(void) + { + get_paca()->ftrace_enabled = 1; + } ++ ++void ftrace_free_init_tramp(void); + #else /* CONFIG_PPC64 */ + static inline void this_cpu_disable_ftrace(void) { } + static inline void this_cpu_enable_ftrace(void) { } ++static inline void ftrace_free_init_tramp(void) { } + #endif /* CONFIG_PPC64 */ + #endif /* !__ASSEMBLY__ */ + +diff --git a/arch/powerpc/kernel/trace/ftrace.c b/arch/powerpc/kernel/trace/ftrace.c +index 7ea0ca044b650..d816e714f2f48 100644 +--- a/arch/powerpc/kernel/trace/ftrace.c ++++ b/arch/powerpc/kernel/trace/ftrace.c +@@ -328,9 +328,7 @@ static int setup_mcount_compiler_tramp(unsigned long tramp) + + /* Is this a known long jump tramp? */ + for (i = 0; i < NUM_FTRACE_TRAMPS; i++) +- if (!ftrace_tramps[i]) +- break; +- else if (ftrace_tramps[i] == tramp) ++ if (ftrace_tramps[i] == tramp) + return 0; + + /* Is this a known plt tramp? */ +@@ -868,6 +866,17 @@ void arch_ftrace_update_code(int command) + + extern unsigned int ftrace_tramp_text[], ftrace_tramp_init[]; + ++void ftrace_free_init_tramp(void) ++{ ++ int i; ++ ++ for (i = 0; i < NUM_FTRACE_TRAMPS && ftrace_tramps[i]; i++) ++ if (ftrace_tramps[i] == (unsigned long)ftrace_tramp_init) { ++ ftrace_tramps[i] = 0; ++ return; ++ } ++} ++ + int __init ftrace_dyn_arch_init(void) + { + int i; +diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c +index c48705c726ac6..d427f70556eab 100644 +--- a/arch/powerpc/mm/mem.c ++++ b/arch/powerpc/mm/mem.c +@@ -48,6 +48,7 @@ + #include <asm/fixmap.h> + #include <asm/swiotlb.h> + #include <asm/rtas.h> ++#include <asm/ftrace.h> + + #include <mm/mmu_decl.h> + +@@ -346,6 +347,7 @@ void free_initmem(void) + mark_initmem_nx(); + init_mem_is_free = true; + free_initmem_default(POISON_FREE_INITMEM); ++ ftrace_free_init_tramp(); + } + + /** +diff --git a/arch/s390/include/asm/kexec.h b/arch/s390/include/asm/kexec.h +index 7f3c9ac34bd8d..63098df81c9f2 100644 +--- a/arch/s390/include/asm/kexec.h ++++ b/arch/s390/include/asm/kexec.h +@@ -9,6 +9,8 @@ + #ifndef _S390_KEXEC_H + #define _S390_KEXEC_H + ++#include <linux/module.h> ++ + #include <asm/processor.h> + #include <asm/page.h> + #include <asm/setup.h> +@@ -83,4 +85,12 @@ struct kimage_arch { + extern const struct kexec_file_ops s390_kexec_image_ops; + extern const struct kexec_file_ops s390_kexec_elf_ops; + ++#ifdef CONFIG_KEXEC_FILE ++struct purgatory_info; ++int arch_kexec_apply_relocations_add(struct purgatory_info *pi, ++ Elf_Shdr *section, ++ const Elf_Shdr *relsec, ++ const Elf_Shdr *symtab); ++#define arch_kexec_apply_relocations_add arch_kexec_apply_relocations_add ++#endif + #endif /*_S390_KEXEC_H */ +diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h +index 5e7d6b46de97d..367da081f7d9d 100644 +--- a/arch/x86/include/asm/kexec.h ++++ b/arch/x86/include/asm/kexec.h +@@ -22,6 +22,7 @@ + + #include <linux/string.h> + #include <linux/kernel.h> ++#include <linux/module.h> + + #include <asm/page.h> + #include <asm/ptrace.h> +@@ -201,6 +202,14 @@ extern int arch_kexec_post_alloc_pages(void *vaddr, unsigned int pages, + extern void arch_kexec_pre_free_pages(void *vaddr, unsigned int pages); + #define arch_kexec_pre_free_pages arch_kexec_pre_free_pages + ++#ifdef CONFIG_KEXEC_FILE ++struct purgatory_info; ++int arch_kexec_apply_relocations_add(struct purgatory_info *pi, ++ Elf_Shdr *section, ++ const Elf_Shdr *relsec, ++ const Elf_Shdr *symtab); ++#define arch_kexec_apply_relocations_add arch_kexec_apply_relocations_add ++#endif + #endif + + typedef void crash_vmclear_fn(void); +diff --git a/drivers/gpu/drm/drm_crtc_helper_internal.h b/drivers/gpu/drm/drm_crtc_helper_internal.h +index b5ac1581e6231..d595697d3d7e0 100644 +--- a/drivers/gpu/drm/drm_crtc_helper_internal.h ++++ b/drivers/gpu/drm/drm_crtc_helper_internal.h +@@ -32,16 +32,6 @@ + #include <drm/drm_encoder.h> + #include <drm/drm_modes.h> + +-/* drm_fb_helper.c */ +-#ifdef CONFIG_DRM_FBDEV_EMULATION +-int drm_fb_helper_modinit(void); +-#else +-static inline int drm_fb_helper_modinit(void) +-{ +- return 0; +-} +-#endif +- + /* drm_dp_aux_dev.c */ + #ifdef CONFIG_DRM_DP_AUX_CHARDEV + int drm_dp_aux_dev_init(void); +diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c +index 02ffde5fd7226..4ae68bf048920 100644 +--- a/drivers/gpu/drm/drm_fb_helper.c ++++ b/drivers/gpu/drm/drm_fb_helper.c +@@ -2415,24 +2415,3 @@ int drm_fbdev_generic_setup(struct drm_device *dev, unsigned int preferred_bpp) + return 0; + } + EXPORT_SYMBOL(drm_fbdev_generic_setup); +- +-/* The Kconfig DRM_KMS_HELPER selects FRAMEBUFFER_CONSOLE (if !EXPERT) +- * but the module doesn't depend on any fb console symbols. At least +- * attempt to load fbcon to avoid leaving the system without a usable console. +- */ +-int __init drm_fb_helper_modinit(void) +-{ +-#if defined(CONFIG_FRAMEBUFFER_CONSOLE_MODULE) && !defined(CONFIG_EXPERT) +- const char name[] = "fbcon"; +- struct module *fbcon; +- +- mutex_lock(&module_mutex); +- fbcon = find_module(name); +- mutex_unlock(&module_mutex); +- +- if (!fbcon) +- request_module_nowait(name); +-#endif +- return 0; +-} +-EXPORT_SYMBOL(drm_fb_helper_modinit); +diff --git a/drivers/gpu/drm/drm_kms_helper_common.c b/drivers/gpu/drm/drm_kms_helper_common.c +index 221a8528c9937..f933da1656eb5 100644 +--- a/drivers/gpu/drm/drm_kms_helper_common.c ++++ b/drivers/gpu/drm/drm_kms_helper_common.c +@@ -64,19 +64,18 @@ MODULE_PARM_DESC(edid_firmware, + + static int __init drm_kms_helper_init(void) + { +- int ret; +- +- /* Call init functions from specific kms helpers here */ +- ret = drm_fb_helper_modinit(); +- if (ret < 0) +- goto out; +- +- ret = drm_dp_aux_dev_init(); +- if (ret < 0) +- goto out; +- +-out: +- return ret; ++ /* ++ * The Kconfig DRM_KMS_HELPER selects FRAMEBUFFER_CONSOLE (if !EXPERT) ++ * but the module doesn't depend on any fb console symbols. At least ++ * attempt to load fbcon to avoid leaving the system without a usable ++ * console. ++ */ ++ if (IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION) && ++ IS_MODULE(CONFIG_FRAMEBUFFER_CONSOLE) && ++ !IS_ENABLED(CONFIG_EXPERT)) ++ request_module_nowait("fbcon"); ++ ++ return drm_dp_aux_dev_init(); + } + + static void __exit drm_kms_helper_exit(void) +diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c +index bf7832b34a000..acddb3aa53de4 100644 +--- a/drivers/net/ethernet/mscc/ocelot.c ++++ b/drivers/net/ethernet/mscc/ocelot.c +@@ -2153,8 +2153,12 @@ int ocelot_init(struct ocelot *ocelot) + ocelot_write_rix(ocelot, + ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), + ANA_PGID_PGID, PGID_MC); +- ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_MCIPV4); +- ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_MCIPV6); ++ ocelot_write_rix(ocelot, ++ ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), ++ ANA_PGID_PGID, PGID_MCIPV4); ++ ocelot_write_rix(ocelot, ++ ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), ++ ANA_PGID_PGID, PGID_MCIPV6); + + /* CPU port Injection/Extraction configuration */ + ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE | +diff --git a/include/linux/kexec.h b/include/linux/kexec.h +index a1cffce3de8cd..64f23bab6255d 100644 +--- a/include/linux/kexec.h ++++ b/include/linux/kexec.h +@@ -186,14 +186,6 @@ void *kexec_purgatory_get_symbol_addr(struct kimage *image, const char *name); + int __weak arch_kexec_kernel_image_probe(struct kimage *image, void *buf, + unsigned long buf_len); + void * __weak arch_kexec_kernel_image_load(struct kimage *image); +-int __weak arch_kexec_apply_relocations_add(struct purgatory_info *pi, +- Elf_Shdr *section, +- const Elf_Shdr *relsec, +- const Elf_Shdr *symtab); +-int __weak arch_kexec_apply_relocations(struct purgatory_info *pi, +- Elf_Shdr *section, +- const Elf_Shdr *relsec, +- const Elf_Shdr *symtab); + + extern int kexec_add_buffer(struct kexec_buf *kbuf); + int kexec_locate_mem_hole(struct kexec_buf *kbuf); +@@ -216,6 +208,44 @@ extern int crash_exclude_mem_range(struct crash_mem *mem, + unsigned long long mend); + extern int crash_prepare_elf64_headers(struct crash_mem *mem, int kernel_map, + void **addr, unsigned long *sz); ++ ++#ifndef arch_kexec_apply_relocations_add ++/* ++ * arch_kexec_apply_relocations_add - apply relocations of type RELA ++ * @pi: Purgatory to be relocated. ++ * @section: Section relocations applying to. ++ * @relsec: Section containing RELAs. ++ * @symtab: Corresponding symtab. ++ * ++ * Return: 0 on success, negative errno on error. ++ */ ++static inline int ++arch_kexec_apply_relocations_add(struct purgatory_info *pi, Elf_Shdr *section, ++ const Elf_Shdr *relsec, const Elf_Shdr *symtab) ++{ ++ pr_err("RELA relocation unsupported.\n"); ++ return -ENOEXEC; ++} ++#endif ++ ++#ifndef arch_kexec_apply_relocations ++/* ++ * arch_kexec_apply_relocations - apply relocations of type REL ++ * @pi: Purgatory to be relocated. ++ * @section: Section relocations applying to. ++ * @relsec: Section containing RELs. ++ * @symtab: Corresponding symtab. ++ * ++ * Return: 0 on success, negative errno on error. ++ */ ++static inline int ++arch_kexec_apply_relocations(struct purgatory_info *pi, Elf_Shdr *section, ++ const Elf_Shdr *relsec, const Elf_Shdr *symtab) ++{ ++ pr_err("REL relocation unsupported.\n"); ++ return -ENOEXEC; ++} ++#endif + #endif /* CONFIG_KEXEC_FILE */ + + #ifdef CONFIG_KEXEC_ELF +diff --git a/kernel/kexec_file.c b/kernel/kexec_file.c +index b17998fa03f12..5b58149bcd900 100644 +--- a/kernel/kexec_file.c ++++ b/kernel/kexec_file.c +@@ -107,40 +107,6 @@ int __weak arch_kexec_kernel_verify_sig(struct kimage *image, void *buf, + } + #endif + +-/* +- * arch_kexec_apply_relocations_add - apply relocations of type RELA +- * @pi: Purgatory to be relocated. +- * @section: Section relocations applying to. +- * @relsec: Section containing RELAs. +- * @symtab: Corresponding symtab. +- * +- * Return: 0 on success, negative errno on error. +- */ +-int __weak +-arch_kexec_apply_relocations_add(struct purgatory_info *pi, Elf_Shdr *section, +- const Elf_Shdr *relsec, const Elf_Shdr *symtab) +-{ +- pr_err("RELA relocation unsupported.\n"); +- return -ENOEXEC; +-} +- +-/* +- * arch_kexec_apply_relocations - apply relocations of type REL +- * @pi: Purgatory to be relocated. +- * @section: Section relocations applying to. +- * @relsec: Section containing RELs. +- * @symtab: Corresponding symtab. +- * +- * Return: 0 on success, negative errno on error. +- */ +-int __weak +-arch_kexec_apply_relocations(struct purgatory_info *pi, Elf_Shdr *section, +- const Elf_Shdr *relsec, const Elf_Shdr *symtab) +-{ +- pr_err("REL relocation unsupported.\n"); +- return -ENOEXEC; +-} +- + /* + * Free up memory used by kernel, initrd, and command line. This is temporary + * memory allocation which is not needed any more after these buffers have
