commit: 939f10540fec60b4b22708ebd89610d95ff2097d Author: Mike Gilbert <floppym <AT> gentoo <DOT> org> AuthorDate: Tue May 9 20:22:13 2023 +0000 Commit: Mike Gilbert <floppym <AT> gentoo <DOT> org> CommitDate: Tue May 9 20:22:13 2023 +0000 URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=939f1054
sys-boot/grub: backport build fix for RISCV Closes: https://bugs.gentoo.org/905785 Signed-off-by: Mike Gilbert <floppym <AT> gentoo.org> sys-boot/grub/files/grub-2.06-riscv.patch | 49 +++++++++++++++++++++++++++++++ sys-boot/grub/grub-2.06-r6.ebuild | 1 + 2 files changed, 50 insertions(+) diff --git a/sys-boot/grub/files/grub-2.06-riscv.patch b/sys-boot/grub/files/grub-2.06-riscv.patch new file mode 100644 index 000000000000..83c54375704b --- /dev/null +++ b/sys-boot/grub/files/grub-2.06-riscv.patch @@ -0,0 +1,49 @@ +https://bugs.gentoo.org/905785 + +From 049efdd72eb7baa7b2bf8884391ee7fe650da5a0 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt <[email protected]> +Date: Sat, 29 Jan 2022 13:36:55 +0100 +Subject: RISC-V: Adjust -march flags for binutils 2.38 + +As of version 2.38 binutils defaults to ISA specification version +2019-12-13. This version of the specification has has separated the +the csr read/write (csrr*/csrw*) instructions and the fence.i from +the I extension and put them into separate Zicsr and Zifencei +extensions. + +This implies that we have to adjust the -march flag passed to the +compiler accordingly. + +Signed-off-by: Heinrich Schuchardt <[email protected]> +Reviewed-by: Daniel Kiper <[email protected]> +--- + configure.ac | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/configure.ac b/configure.ac +index 4f649ed..5c01af0 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -870,11 +870,19 @@ if test x"$platform" != xemu ; then + CFLAGS="$TARGET_CFLAGS -march=rv32imac -mabi=ilp32 -Werror" + AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])], + [grub_cv_target_cc_soft_float="-march=rv32imac -mabi=ilp32"], []) ++ # ISA spec version 20191213 factored out extensions Zicsr and Zifencei ++ CFLAGS="$TARGET_CFLAGS -march=rv32imac_zicsr_zifencei -mabi=ilp32 -Werror" ++ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])], ++ [grub_cv_target_cc_soft_float="-march=rv32imac_zicsr_zifencei -mabi=ilp32"], []) + fi + if test "x$target_cpu" = xriscv64; then + CFLAGS="$TARGET_CFLAGS -march=rv64imac -mabi=lp64 -Werror" + AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])], + [grub_cv_target_cc_soft_float="-march=rv64imac -mabi=lp64"], []) ++ # ISA spec version 20191213 factored out extensions Zicsr and Zifencei ++ CFLAGS="$TARGET_CFLAGS -march=rv64imac_zicsr_zifencei -mabi=lp64 -Werror" ++ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])], ++ [grub_cv_target_cc_soft_float="-march=rv64imac_zicsr_zifencei -mabi=lp64"], []) + fi + if test "x$target_cpu" = xia64; then + CFLAGS="$TARGET_CFLAGS -mno-inline-float-divide -mno-inline-sqrt -Werror" +-- +cgit v1.1 + diff --git a/sys-boot/grub/grub-2.06-r6.ebuild b/sys-boot/grub/grub-2.06-r6.ebuild index ee01fcc6bfeb..707acec900be 100644 --- a/sys-boot/grub/grub-2.06-r6.ebuild +++ b/sys-boot/grub/grub-2.06-r6.ebuild @@ -62,6 +62,7 @@ PATCHES=( "${FILESDIR}"/grub-2.06-grub-mkconfig-restore-umask.patch "${FILESDIR}"/grub-2.06-gentpl.py-Remove-.interp-section-from-.img-files.patch "${FILESDIR}"/grub-2.06-fs-ext2-ignore-checksum-seed.patch + "${FILESDIR}"/grub-2.06-riscv.patch ) DEJAVU=dejavu-sans-ttf-2.37
