commit:     d111dc15a63f9ca01c9ac7736e334ab2788de2df
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Wed May  8 20:40:07 2024 +0000
Commit:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
CommitDate: Wed May  8 20:42:50 2024 +0000
URL:        https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=d111dc15

dev-util/intel_clc: Version bump to 24.0.7

Signed-off-by: Matt Turner <mattst88 <AT> gentoo.org>

 dev-util/intel_clc/Manifest                |  1 +
 dev-util/intel_clc/intel_clc-24.0.7.ebuild | 86 ++++++++++++++++++++++++++++++
 2 files changed, 87 insertions(+)

diff --git a/dev-util/intel_clc/Manifest b/dev-util/intel_clc/Manifest
index 7ae411f2b90d..8d311ceb98a3 100644
--- a/dev-util/intel_clc/Manifest
+++ b/dev-util/intel_clc/Manifest
@@ -1,4 +1,5 @@
 DIST mesa-24.0.4.tar.xz 20057744 BLAKE2B 
6de755081f7e9dd9303af791e1a405203388787c294f8163c9d6598aa66eed1c001eeb03203c49ed8a264065458228efd849e6e59091a5963155ce8edc47c63f
 SHA512 
1d05b07026417fbe9cf18f7b18f2db9fe5fe327555c590283d87f69bbdd51f64135928a1dbe155d750187fc268bbdbb070bc1ae9ffc3e013b8707b391969d515
 DIST mesa-24.0.5.tar.xz 20096384 BLAKE2B 
c4c5f493206f761a7171f19c6549dc791559a1fdbcf49aea98016f98c10f9130081a16df6b780062621495a42dc49ef5f0800bda64058e8ba60106f6a046ccef
 SHA512 
9476af4b9ac8db5dce397084ef169927d10b28adea7e74aa5b3136810b499ac98ddf7ab564e7d1ff81c887208c8ebab3ad2d4e27e7f46136609b5c67527018eb
 DIST mesa-24.0.6.tar.xz 20115628 BLAKE2B 
531482c1a01ec4c0bd6b2f0857640c14fcc2ba70e85a14e4edf0f44ba466c12e39ad067690e6a571a0744ae06080943b1328a29263225cb7570f119464e17fbe
 SHA512 
60fcc77132c3cb0c98e650d97d3324bfd18abe7f8f8a3aa5209f71b2fddd94510f939bbf5272b2241749307184d5badde9da4842be57ce13f5760875885ea6fc
+DIST mesa-24.0.7.tar.xz 20144724 BLAKE2B 
d9438e533b471445b2403e01e1fd593d83c0013b0991585f718122f1cadc6ac6bb1fb913f0fb257354ae21ddd9fe1f970ad9ac46f05d756c223ed56a11b9c9ce
 SHA512 
77b0fae80ab0a07e2e528c113eadef0e3004b8df3e6e98fffe6fc2d8ac39f5ce7fa38ebe5c2ae32bfbac993dd7cbe288ace18ebb03cf2fb445fe7114f74dd45c
 DIST mesa-24.1.0-rc1.tar.xz 28863968 BLAKE2B 
6d1b72395c208fcc82838f42b79455ebde3474a5e0362f6ee0ca52031c5ea15e1419bd4c9768649eecdeea51806e3dd7584fc70941b36efc23eb39a1716ac425
 SHA512 
575252e76e9fd0266ca9cdb0acb8b12f2890dcecca904ff46b81d439d70520d58f719c90806a4a72d553fca4214cfa3333e1271a8831a1e6a68ca257affc84e3

diff --git a/dev-util/intel_clc/intel_clc-24.0.7.ebuild 
b/dev-util/intel_clc/intel_clc-24.0.7.ebuild
new file mode 100644
index 000000000000..8bc3bb53f6ba
--- /dev/null
+++ b/dev-util/intel_clc/intel_clc-24.0.7.ebuild
@@ -0,0 +1,86 @@
+# Copyright 2023-2024 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+LLVM_COMPAT=( 16 17 )
+PYTHON_COMPAT=( python3_{10..12} )
+
+inherit llvm-r1 meson python-any-r1
+
+MY_PV="${PV/_/-}"
+
+DESCRIPTION="intel_clc tool used for building OpenCL C to SPIR-V"
+HOMEPAGE="https://mesa3d.org/";
+
+if [[ ${PV} == 9999 ]]; then
+       S="${WORKDIR}/intel_clc-${MY_PV}"
+       EGIT_REPO_URI="https://gitlab.freedesktop.org/mesa/mesa.git";
+       inherit git-r3
+else
+       S="${WORKDIR}/mesa-${MY_PV}"
+       SRC_URI="https://archive.mesa3d.org/mesa-${MY_PV}.tar.xz";
+       KEYWORDS="~amd64"
+fi
+
+LICENSE="MIT SGI-B-2.0"
+SLOT="0"
+IUSE="debug"
+
+RDEPEND="
+       dev-libs/libclc
+       dev-util/spirv-tools
+       >=sys-libs/zlib-1.2.8:=
+       x11-libs/libdrm
+       $(llvm_gen_dep '
+               dev-util/spirv-llvm-translator:${LLVM_SLOT}
+               sys-devel/clang:${LLVM_SLOT}
+               sys-devel/llvm:${LLVM_SLOT}
+       ')
+"
+DEPEND="${RDEPEND}
+       dev-libs/expat
+"
+BDEPEND="
+       ${PYTHON_DEPS}
+       $(python_gen_any_dep ">=dev-python/mako-0.8.0[\${PYTHON_USEDEP}]")
+       virtual/pkgconfig
+"
+
+python_check_deps() {
+       python_has_version -b ">=dev-python/mako-0.8.0[${PYTHON_USEDEP}]"
+}
+
+pkg_setup() {
+       llvm-r1_pkg_setup
+       python-any-r1_pkg_setup
+}
+
+src_configure() {
+       PKG_CONFIG_PATH="$(get_llvm_prefix)/$(get_libdir)/pkgconfig"
+
+       local emesonargs=(
+               -Dllvm=enabled
+               -Dshared-llvm=enabled
+               -Dintel-clc=enabled
+
+               -Dgallium-drivers=''
+               -Dvulkan-drivers=''
+
+               # Set platforms empty to avoid the default "auto" setting. If
+               # platforms is empty meson.build will add surfaceless.
+               -Dplatforms=''
+
+               -Dglx=disabled
+               -Dlibunwind=disabled
+               -Dzstd=disabled
+
+               -Dbuildtype=$(usex debug debug plain)
+               -Db_ndebug=$(usex debug false true)
+       )
+       meson_src_configure
+}
+
+src_install() {
+       dobin "${BUILD_DIR}"/src/intel/compiler/intel_clc
+}

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