commit: 02df93448e5da7575a47ca81df06650e07d2e154 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> AuthorDate: Mon Oct 21 13:34:48 2024 +0000 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> CommitDate: Mon Oct 21 13:34:48 2024 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=02df9344
Update CPU Optimization Patch Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> 5010_enable-cpu-optimizations-universal.patch | 421 ++++++++++++-------------- 1 file changed, 188 insertions(+), 233 deletions(-) diff --git a/5010_enable-cpu-optimizations-universal.patch b/5010_enable-cpu-optimizations-universal.patch index b5382da3..0758b0ba 100644 --- a/5010_enable-cpu-optimizations-universal.patch +++ b/5010_enable-cpu-optimizations-universal.patch @@ -1,26 +1,37 @@ -rom 86977b5357d9212d57841bc325e80f43081bb333 Mon Sep 17 00:00:00 2001 -From: graysky <[email protected]> -Date: Wed, 21 Feb 2024 08:38:13 -0500 +From d66d4da9e6fbd22780826ec7d55d65c3ecaf1e66 Mon Sep 17 00:00:00 2001 +From: graysky <therealgraysky AT proton DOT me> +Date: Mon, 16 Sep 2024 05:55:58 -0400 FEATURES -This patch adds additional CPU options to the Linux kernel accessible under: - Processor type and features ---> - Processor family ---> +This patch adds additional tunings via new x86-64 ISA levels and +more micro-architecture options to the Linux kernel in three classes. -With the release of gcc 11.1 and clang 12.0, several generic 64-bit levels are -offered which are good for supported Intel or AMD CPUs: -• x86-64-v2 -• x86-64-v3 -• x86-64-v4 +1. New generic x86-64 ISA levels + +These are selectable under: + Processor type and features ---> x86-64 compiler ISA level + +• x86-64 A value of (1) is the default +• x86-64-v2 A value of (2) brings support for vector + instructions up to Streaming SIMD Extensions 4.2 (SSE4.2) + and Supplemental Streaming SIMD Extensions 3 (SSSE3), the + POPCNT instruction, and CMPXCHG16B. +• x86-64-v3 A value of (3) adds vector instructions up to AVX2, MOVBE, + and additional bit-manipulation instructions. + +There is also x86-64-v4 but including this makes little sense as +the kernel does not use any of the AVX512 instructions anyway. Users of glibc 2.33 and above can see which level is supported by running: - /lib/ld-linux-x86-64.so.2 --help | grep supported + /lib/ld-linux-x86-64.so.2 --help | grep supported Or - /lib64/ld-linux-x86-64.so.2 --help | grep supported + /lib64/ld-linux-x86-64.so.2 --help | grep supported + +2. New micro-architectures -Alternatively, compare the flags from /proc/cpuinfo to this list.[1] +These are selectable under: + Processor type and features ---> Processor family -CPU-specific microarchitectures include: • AMD Improved K8-family • AMD K10-family • AMD Family 10h (Barcelona) @@ -63,14 +74,15 @@ Notes: If not otherwise noted, gcc >=9.1 is required for support. **Required gcc >=10.3 or clang >=12.0 †Required gcc >=11.1 or clang >=12.0 ‡Required gcc >=13.0 or clang >=15.0.5 - §Required gcc >=14.1 or clang >=19.0? + §Required gcc >14.0 or clang >=19.0? +3. Auto-detected micro-architecture levels -It also offers to compile passing the 'native' option which, "selects the CPU +Compile by passing the '-march=native' option which, "selects the CPU to generate code for at compilation time by determining the processor type of the compiling machine. Using -march=native enables all instruction subsets supported by the local machine and will produce code optimized for the local -machine under the constraints of the selected instruction set."[2] +machine under the constraints of the selected instruction set."[1] Users of Intel CPUs should select the 'Intel-Native' option and users of AMD CPUs should select the 'AMD-Native' option. @@ -78,9 +90,9 @@ CPUs should select the 'AMD-Native' option. MINOR NOTES RELATING TO INTEL ATOM PROCESSORS This patch also changes -march=atom to -march=bonnell in accordance with the gcc v4.9 changes. Upstream is using the deprecated -match=atom flags when I -believe it should use the newer -march=bonnell flag for atom processors.[3] +believe it should use the newer -march=bonnell flag for atom processors.[2] -It is not recommended to compile on Atom-CPUs with the 'native' option.[4] The +It is not recommended to compile on Atom-CPUs with the 'native' option.[3] The recommendation is to use the 'atom' option instead. BENEFITS @@ -88,52 +100,54 @@ Small but real speed increases are measurable using a make endpoint comparing a generic kernel to one built with one of the respective microarchs. See the following experimental evidence supporting this statement: -https://github.com/graysky2/kernel_gcc_patch +https://github.com/graysky2/kernel_compiler_patch?tab=readme-ov-file#benchmarks REQUIREMENTS -linux version 5.17+ +linux version 6.1.79+ gcc version >=9.0 or clang version >=9.0 ACKNOWLEDGMENTS -This patch builds on the seminal work by Jeroen.[5] +This patch builds on the seminal work by Jeroen.[4] REFERENCES -1. https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/77566eb03bc6a326811cb7e9 -2. https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html#index-x86-Options -3. https://bugzilla.kernel.org/show_bug.cgi?id=77461 -4. https://github.com/graysky2/kernel_gcc_patch/issues/15 -5. http://www.linuxforge.net/docs/linux/linux-gcc.php +1. https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html#index-x86-Options +2. https://bugzilla.kernel.org/show_bug.cgi?id=77461 +3. https://github.com/graysky2/kernel_gcc_patch/issues/15 +4. http://www.linuxforge.net/docs/linux/linux-gcc.php + --- - arch/x86/Kconfig.cpu | 432 ++++++++++++++++++++++++++++++-- - arch/x86/Makefile | 45 +++- - arch/x86/include/asm/vermagic.h | 76 ++++++ - 3 files changed, 537 insertions(+), 16 deletions(-) + arch/x86/Kconfig.cpu | 359 ++++++++++++++++++++++++++++++-- + arch/x86/Makefile | 87 +++++++- + arch/x86/include/asm/vermagic.h | 70 +++++++ + 3 files changed, 499 insertions(+), 17 deletions(-) diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu -index 2a7279d80460a..55941c31ade35 100644 +index 2a7279d80460..abfadddd1b23 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu -@@ -157,7 +157,7 @@ config MPENTIUM4 - - +@@ -155,9 +155,8 @@ config MPENTIUM4 + -Paxville + -Dempsey + +- config MK6 - bool "K6/K6-II/K6-III" + bool "AMD K6/K6-II/K6-III" depends on X86_32 help Select this for an AMD K6-family processor. Enables use of -@@ -165,7 +165,7 @@ config MK6 +@@ -165,7 +164,7 @@ config MK6 flags to GCC. - + config MK7 - bool "Athlon/Duron/K7" + bool "AMD Athlon/Duron/K7" depends on X86_32 help Select this for an AMD Athlon K7-family processor. Enables use of -@@ -173,12 +173,114 @@ config MK7 +@@ -173,12 +172,114 @@ config MK7 flags to GCC. - + config MK8 - bool "Opteron/Athlon64/Hammer/K8" + bool "AMD Opteron/Athlon64/Hammer/K8" @@ -141,7 +155,7 @@ index 2a7279d80460a..55941c31ade35 100644 Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables use of some extended instructions, and passes appropriate optimization flags to GCC. - + +config MK8SSE3 + bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3" + help @@ -238,7 +252,7 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MZEN5 + bool "AMD Zen 5" -+ depends on (CC_IS_GCC && GCC_VERSION >= 141000) || (CC_IS_CLANG && CLANG_VERSION >= 180000) ++ depends on (CC_IS_GCC && GCC_VERSION > 140000) || (CC_IS_CLANG && CLANG_VERSION >= 191000) + help + Select this for AMD Family 19h Zen 5 processors. + @@ -247,40 +261,47 @@ index 2a7279d80460a..55941c31ade35 100644 config MCRUSOE bool "Crusoe" depends on X86_32 -@@ -270,7 +372,7 @@ config MPSC +@@ -269,8 +370,17 @@ config MPSC + using the cpu family field in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one. - + ++config MATOM ++ bool "Intel Atom" ++ help ++ ++ Select this for the Intel Atom platform. Intel Atom CPUs have an ++ in-order pipelining architecture and thus can benefit from ++ accordingly optimized code. Use a recent GCC with specific Atom ++ support in order to fully benefit from selecting this option. ++ config MCORE2 - bool "Core 2/newer Xeon" + bool "Intel Core 2" help - + Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and -@@ -278,6 +380,8 @@ config MCORE2 +@@ -278,14 +388,191 @@ config MCORE2 family in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo) - + +-config MATOM +- bool "Intel Atom" + Enables -march=core2 + - config MATOM - bool "Intel Atom" - help -@@ -287,6 +391,212 @@ config MATOM - accordingly optimized code. Use a recent GCC with specific Atom - support in order to fully benefit from selecting this option. - +config MNEHALEM + bool "Intel Nehalem" -+ select X86_P6_NOP -+ help -+ + help + +- Select this for the Intel Atom platform. Intel Atom CPUs have an +- in-order pipelining architecture and thus can benefit from +- accordingly optimized code. Use a recent GCC with specific Atom +- support in order to fully benefit from selecting this option. + Select this for 1st Gen Core processors in the Nehalem family. + + Enables -march=nehalem + +config MWESTMERE + bool "Intel Westmere" -+ select X86_P6_NOP + help + + Select this for the Intel Westmere formerly Nehalem-C family. @@ -289,7 +310,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MSILVERMONT + bool "Intel Silvermont" -+ select X86_P6_NOP + help + + Select this for the Intel Silvermont platform. @@ -298,7 +318,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MGOLDMONT + bool "Intel Goldmont" -+ select X86_P6_NOP + help + + Select this for the Intel Goldmont platform including Apollo Lake and Denverton. @@ -307,7 +326,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MGOLDMONTPLUS + bool "Intel Goldmont Plus" -+ select X86_P6_NOP + help + + Select this for the Intel Goldmont Plus platform including Gemini Lake. @@ -316,7 +334,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MSANDYBRIDGE + bool "Intel Sandy Bridge" -+ select X86_P6_NOP + help + + Select this for 2nd Gen Core processors in the Sandy Bridge family. @@ -325,7 +342,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MIVYBRIDGE + bool "Intel Ivy Bridge" -+ select X86_P6_NOP + help + + Select this for 3rd Gen Core processors in the Ivy Bridge family. @@ -334,7 +350,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MHASWELL + bool "Intel Haswell" -+ select X86_P6_NOP + help + + Select this for 4th Gen Core processors in the Haswell family. @@ -343,7 +358,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MBROADWELL + bool "Intel Broadwell" -+ select X86_P6_NOP + help + + Select this for 5th Gen Core processors in the Broadwell family. @@ -352,7 +366,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MSKYLAKE + bool "Intel Skylake" -+ select X86_P6_NOP + help + + Select this for 6th Gen Core processors in the Skylake family. @@ -361,7 +374,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MSKYLAKEX + bool "Intel Skylake X" -+ select X86_P6_NOP + help + + Select this for 6th Gen Core processors in the Skylake X family. @@ -370,7 +382,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MCANNONLAKE + bool "Intel Cannon Lake" -+ select X86_P6_NOP + help + + Select this for 8th Gen Core processors @@ -379,7 +390,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MICELAKE + bool "Intel Ice Lake" -+ select X86_P6_NOP + help + + Select this for 10th Gen Core processors in the Ice Lake family. @@ -388,7 +398,6 @@ index 2a7279d80460a..55941c31ade35 100644 + +config MCASCADELAKE + bool "Intel Cascade Lake" -+ select X86_P6_NOP + help + + Select this for Xeon processors in the Cascade Lake family. @@ -398,7 +407,6 @@ index 2a7279d80460a..55941c31ade35 100644 +config MCOOPERLAKE + bool "Intel Cooper Lake" + depends on (CC_IS_GCC && GCC_VERSION > 100100) || (CC_IS_CLANG && CLANG_VERSION >= 100000) -+ select X86_P6_NOP + help + + Select this for Xeon processors in the Cooper Lake family. @@ -408,7 +416,6 @@ index 2a7279d80460a..55941c31ade35 100644 +config MTIGERLAKE + bool "Intel Tiger Lake" + depends on (CC_IS_GCC && GCC_VERSION > 100100) || (CC_IS_CLANG && CLANG_VERSION >= 100000) -+ select X86_P6_NOP + help + + Select this for third-generation 10 nm process processors in the Tiger Lake family. @@ -418,7 +425,6 @@ index 2a7279d80460a..55941c31ade35 100644 +config MSAPPHIRERAPIDS + bool "Intel Sapphire Rapids" + depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000) -+ select X86_P6_NOP + help + + Select this for fourth-generation 10 nm process processors in the Sapphire Rapids family. @@ -428,7 +434,6 @@ index 2a7279d80460a..55941c31ade35 100644 +config MROCKETLAKE + bool "Intel Rocket Lake" + depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000) -+ select X86_P6_NOP + help + + Select this for eleventh-generation processors in the Rocket Lake family. @@ -438,7 +443,6 @@ index 2a7279d80460a..55941c31ade35 100644 +config MALDERLAKE + bool "Intel Alder Lake" + depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000) -+ select X86_P6_NOP + help + + Select this for twelfth-generation processors in the Alder Lake family. @@ -448,7 +452,6 @@ index 2a7279d80460a..55941c31ade35 100644 +config MRAPTORLAKE + bool "Intel Raptor Lake" + depends on (CC_IS_GCC && GCC_VERSION >= 130000) || (CC_IS_CLANG && CLANG_VERSION >= 150500) -+ select X86_P6_NOP + help + + Select this for thirteenth-generation processors in the Raptor Lake family. @@ -458,7 +461,6 @@ index 2a7279d80460a..55941c31ade35 100644 +config MMETEORLAKE + bool "Intel Meteor Lake" + depends on (CC_IS_GCC && GCC_VERSION >= 130000) || (CC_IS_CLANG && CLANG_VERSION >= 150500) -+ select X86_P6_NOP + help + + Select this for fourteenth-generation processors in the Meteor Lake family. @@ -468,44 +470,18 @@ index 2a7279d80460a..55941c31ade35 100644 +config MEMERALDRAPIDS + bool "Intel Emerald Rapids" + depends on (CC_IS_GCC && GCC_VERSION > 130000) || (CC_IS_CLANG && CLANG_VERSION >= 150500) -+ select X86_P6_NOP + help + + Select this for fifth-generation 10 nm process processors in the Emerald Rapids family. + + Enables -march=emeraldrapids -+ + config GENERIC_CPU bool "Generic-x86-64" - depends on X86_64 -@@ -294,6 +604,50 @@ config GENERIC_CPU +@@ -294,6 +581,26 @@ config GENERIC_CPU Generic x86-64 CPU. Run equally well on all x86-64 CPUs. - -+config GENERIC_CPU2 -+ bool "Generic-x86-64-v2" -+ depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000) -+ depends on X86_64 -+ help -+ Generic x86-64 CPU. -+ Run equally well on all x86-64 CPUs with min support of x86-64-v2. -+ -+config GENERIC_CPU3 -+ bool "Generic-x86-64-v3" -+ depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000) -+ depends on X86_64 -+ help -+ Generic x86-64-v3 CPU with v3 instructions. -+ Run equally well on all x86-64 CPUs with min support of x86-64-v3. -+ -+config GENERIC_CPU4 -+ bool "Generic-x86-64-v4" -+ depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000) -+ depends on X86_64 -+ help -+ Generic x86-64 CPU with v4 instructions. -+ Run equally well on all x86-64 CPUs with min support of x86-64-v4. -+ + +config MNATIVE_INTEL + bool "Intel-Native optimizations autodetected by the compiler" + help @@ -527,135 +503,80 @@ index 2a7279d80460a..55941c31ade35 100644 + Enables -march=native + endchoice - + config X86_GENERIC -@@ -318,9 +672,17 @@ config X86_INTERNODE_CACHE_SHIFT +@@ -308,6 +615,30 @@ config X86_GENERIC + This is really intended for distributors who need more + generic optimizations. + ++config X86_64_VERSION ++ int "x86-64 compiler ISA level" ++ range 1 3 ++ depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000) ++ depends on X86_64 && GENERIC_CPU ++ help ++ Specify a specific x86-64 compiler ISA level. ++ ++ There are three x86-64 ISA levels that work on top of ++ the x86-64 baseline, namely: x86-64-v2, x86-64-v3, and x86-64-v4. ++ ++ x86-64-v2 brings support for vector instructions up to Streaming SIMD ++ Extensions 4.2 (SSE4.2) and Supplemental Streaming SIMD Extensions 3 ++ (SSSE3), the POPCNT instruction, and CMPXCHG16B. ++ ++ x86-64-v3 adds vector instructions up to AVX2, MOVBE, and additional ++ bit-manipulation instructions. ++ ++ x86-64-v4 is not included since the kernel does not use AVX512 instructions ++ ++ You can find the best version for your CPU by running one of the following: ++ /lib/ld-linux-x86-64.so.2 --help | grep supported ++ /lib64/ld-linux-x86-64.so.2 --help | grep supported ++ + # + # Define implied options from the CPU selection here + config X86_INTERNODE_CACHE_SHIFT +@@ -318,7 +649,7 @@ config X86_INTERNODE_CACHE_SHIFT config X86_L1_CACHE_SHIFT int default "7" if MPENTIUM4 || MPSC - default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU -+ default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || MK8SSE3 || MK10 \ -+ || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER \ -+ || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MZEN4 || MZEN5 || MNEHALEM || MWESTMERE || MSILVERMONT \ -+ || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL \ -+ || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE \ -+ || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE \ -+ || MEMERALDRAPIDS || MNATIVE_INTEL || MNATIVE_AMD || X86_GENERIC || GENERIC_CPU || GENERIC_CPU2 \ -+ || GENERIC_CPU3 || GENERIC_CPU4 ++ default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MZEN4 || MZEN5 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS || MNATIVE_INTEL || MNATIVE_AMD default "4" if MELAN || M486SX || M486 || MGEODEGX1 -- default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX -+ default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII \ -+ || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX - - config X86_F00F_BUG - def_bool y -@@ -332,15 +694,27 @@ config X86_INVD_BUG - - config X86_ALIGNMENT_16 - def_bool y -- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486SX || M486 || MVIAC3_2 || MGEODEGX1 -+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC \ -+ || M586 || M486SX || M486 || MVIAC3_2 || MGEODEGX1 - + default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX + +@@ -336,11 +667,11 @@ config X86_ALIGNMENT_16 + config X86_INTEL_USERCOPY def_bool y - depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 -+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC \ -+ || MK8 || MK7 || MEFFICEON || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT \ -+ || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX \ -+ || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS \ -+ || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS || MNATIVE_INTEL - ++ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS || MNATIVE_INTEL + config X86_USE_PPRO_CHECKSUM def_bool y - depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM -+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM \ -+ || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX \ -+ || MCORE2 || MATOM || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER \ -+ || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MZEN4 || MZEN5 || MNEHALEM \ -+ || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE \ -+ || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE \ -+ || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE \ -+ || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS || MNATIVE_INTEL || MNATIVE_AMD - ++ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MZEN4 || MZEN5 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS || MNATIVE_INTEL || MNATIVE_AMD + # # P6_NOPs are a relatively minor optimization that require a family >= -@@ -356,11 +730,22 @@ config X86_USE_PPRO_CHECKSUM - config X86_P6_NOP - def_bool y - depends on X86_64 -- depends on (MCORE2 || MPENTIUM4 || MPSC) -+ depends on (MCORE2 || MPENTIUM4 || MPSC || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT \ -+ || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE \ -+ || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE \ -+ || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS \ -+ || MNATIVE_INTEL) - - config X86_TSC - def_bool y -- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64 -+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM \ -+ || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 \ -+ || MGEODE_LX || MCORE2 || MATOM || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER \ -+ || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MZEN4 || MZEN5 || MNEHALEM \ -+ || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL \ -+ || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE \ -+ || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS \ -+ || MNATIVE_INTEL || MNATIVE_AMD) || X86_64 - - config X86_HAVE_PAE - def_bool y -@@ -368,18 +753,37 @@ config X86_HAVE_PAE - - config X86_CMPXCHG64 - def_bool y -- depends on X86_HAVE_PAE || M586TSC || M586MMX || MK6 || MK7 -+ depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 \ -+ || M586TSC || M586MMX || MATOM || MGEODE_LX || MGEODEGX1 || MK6 || MK7 || MK8 || MK8SSE3 || MK10 \ -+ || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN \ -+ || MZEN2 || MZEN3 || MZEN4 || MZEN5 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS \ -+ || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE \ -+ || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE \ -+ || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS || MNATIVE_INTEL || MNATIVE_AMD - - # this should be set for all -march=.. options where the compiler - # generates cmov. - config X86_CMOV - def_bool y -- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX) -+ depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 \ -+ || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX || MK8SSE3 || MK10 \ -+ || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR \ -+ || MZEN || MZEN2 || MZEN3 || MZEN4 || MZEN5 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT \ -+ || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX \ -+ || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS \ -+ || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS || MNATIVE_INTEL || MNATIVE_AMD) - - config X86_MINIMUM_CPU_FAMILY - int - default "64" if X86_64 -- default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCORE2 || MK7 || MK8) -+ default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 \ -+ || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCORE2 || MK7 || MK8 || MK8SSE3 \ -+ || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER \ -+ || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MZEN4 || MZEN5 || MNEHALEM || MWESTMERE || MSILVERMONT \ -+ || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL \ -+ || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE \ -+ || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MRAPTORLAKE \ -+ || MNATIVE_INTEL || MNATIVE_AMD) - default "5" if X86_32 && X86_CMPXCHG64 - default "4" - diff --git a/arch/x86/Makefile b/arch/x86/Makefile -index 5ab93fcdd691d..ac203b599befd 100644 +index cd75e78a06c1..396d1db12bca 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile -@@ -156,8 +156,49 @@ else - # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu) +@@ -181,15 +181,96 @@ else cflags-$(CONFIG_MK8) += -march=k8 cflags-$(CONFIG_MPSC) += -march=nocona -- cflags-$(CONFIG_MCORE2) += -march=core2 + cflags-$(CONFIG_MCORE2) += -march=core2 - cflags-$(CONFIG_MATOM) += -march=atom +- cflags-$(CONFIG_GENERIC_CPU) += -mtune=generic ++ cflags-$(CONFIG_MATOM) += -march=bonnell ++ ifeq ($(CONFIG_X86_64_VERSION),1) ++ cflags-$(CONFIG_GENERIC_CPU) += -mtune=generic ++ rustflags-$(CONFIG_GENERIC_CPU) += -Ztune-cpu=generic ++ else ++ cflags-$(CONFIG_GENERIC_CPU) += -march=x86-64-v$(CONFIG_X86_64_VERSION) ++ rustflags-$(CONFIG_GENERIC_CPU) += -Ctarget-cpu=x86-64-v$(CONFIG_X86_64_VERSION) ++ endif + cflags-$(CONFIG_MK8SSE3) += -march=k8-sse3 + cflags-$(CONFIG_MK10) += -march=amdfam10 + cflags-$(CONFIG_MBARCELONA) += -march=barcelona @@ -671,9 +592,7 @@ index 5ab93fcdd691d..ac203b599befd 100644 + cflags-$(CONFIG_MZEN4) += -march=znver4 + cflags-$(CONFIG_MZEN5) += -march=znver5 + cflags-$(CONFIG_MNATIVE_INTEL) += -march=native -+ cflags-$(CONFIG_MNATIVE_AMD) += -march=native -+ cflags-$(CONFIG_MATOM) += -march=bonnell -+ cflags-$(CONFIG_MCORE2) += -march=core2 ++ cflags-$(CONFIG_MNATIVE_AMD) += -march=native -mno-tbm + cflags-$(CONFIG_MNEHALEM) += -march=nehalem + cflags-$(CONFIG_MWESTMERE) += -march=westmere + cflags-$(CONFIG_MSILVERMONT) += -march=silvermont @@ -696,14 +615,56 @@ index 5ab93fcdd691d..ac203b599befd 100644 + cflags-$(CONFIG_MRAPTORLAKE) += -march=raptorlake + cflags-$(CONFIG_MMETEORLAKE) += -march=meteorlake + cflags-$(CONFIG_MEMERALDRAPIDS) += -march=emeraldrapids -+ cflags-$(CONFIG_GENERIC_CPU2) += -march=x86-64-v2 -+ cflags-$(CONFIG_GENERIC_CPU3) += -march=x86-64-v3 -+ cflags-$(CONFIG_GENERIC_CPU4) += -march=x86-64-v4 - cflags-$(CONFIG_GENERIC_CPU) += -mtune=generic KBUILD_CFLAGS += $(cflags-y) - + + rustflags-$(CONFIG_MK8) += -Ctarget-cpu=k8 + rustflags-$(CONFIG_MPSC) += -Ctarget-cpu=nocona + rustflags-$(CONFIG_MCORE2) += -Ctarget-cpu=core2 + rustflags-$(CONFIG_MATOM) += -Ctarget-cpu=atom +- rustflags-$(CONFIG_GENERIC_CPU) += -Ztune-cpu=generic ++ rustflags-$(CONFIG_MK8SSE3) += -Ctarget-cpu=k8-sse3 ++ rustflags-$(CONFIG_MK10) += -Ctarget-cpu=amdfam10 ++ rustflags-$(CONFIG_MBARCELONA) += -Ctarget-cpu=barcelona ++ rustflags-$(CONFIG_MBOBCAT) += -Ctarget-cpu=btver1 ++ rustflags-$(CONFIG_MJAGUAR) += -Ctarget-cpu=btver2 ++ rustflags-$(CONFIG_MBULLDOZER) += -Ctarget-cpu=bdver1 ++ rustflags-$(CONFIG_MPILEDRIVER) += -Ctarget-cpu=bdver2 ++ rustflags-$(CONFIG_MSTEAMROLLER) += -Ctarget-cpu=bdver3 ++ rustflags-$(CONFIG_MEXCAVATOR) += -Ctarget-cpu=bdver4 ++ rustflags-$(CONFIG_MZEN) += -Ctarget-cpu=znver1 ++ rustflags-$(CONFIG_MZEN2) += -Ctarget-cpu=znver2 ++ rustflags-$(CONFIG_MZEN3) += -Ctarget-cpu=znver3 ++ rustflags-$(CONFIG_MZEN4) += -Ctarget-cpu=znver4 ++ rustflags-$(CONFIG_MZEN5) += -Ctarget-cpu=znver5 ++ rustflags-$(CONFIG_MNATIVE_INTEL) += -Ctarget-cpu=native ++ rustflags-$(CONFIG_MNATIVE_AMD) += -Ctarget-cpu=native ++ rustflags-$(CONFIG_MNEHALEM) += -Ctarget-cpu=nehalem ++ rustflags-$(CONFIG_MWESTMERE) += -Ctarget-cpu=westmere ++ rustflags-$(CONFIG_MSILVERMONT) += -Ctarget-cpu=silvermont ++ rustflags-$(CONFIG_MGOLDMONT) += -Ctarget-cpu=goldmont ++ rustflags-$(CONFIG_MGOLDMONTPLUS) += -Ctarget-cpu=goldmont-plus ++ rustflags-$(CONFIG_MSANDYBRIDGE) += -Ctarget-cpu=sandybridge ++ rustflags-$(CONFIG_MIVYBRIDGE) += -Ctarget-cpu=ivybridge ++ rustflags-$(CONFIG_MHASWELL) += -Ctarget-cpu=haswell ++ rustflags-$(CONFIG_MBROADWELL) += -Ctarget-cpu=broadwell ++ rustflags-$(CONFIG_MSKYLAKE) += -Ctarget-cpu=skylake ++ rustflags-$(CONFIG_MSKYLAKEX) += -Ctarget-cpu=skylake-avx512 ++ rustflags-$(CONFIG_MCANNONLAKE) += -Ctarget-cpu=cannonlake ++ rustflags-$(CONFIG_MICELAKE) += -Ctarget-cpu=icelake-client ++ rustflags-$(CONFIG_MCASCADELAKE) += -Ctarget-cpu=cascadelake ++ rustflags-$(CONFIG_MCOOPERLAKE) += -Ctarget-cpu=cooperlake ++ rustflags-$(CONFIG_MTIGERLAKE) += -Ctarget-cpu=tigerlake ++ rustflags-$(CONFIG_MSAPPHIRERAPIDS) += -Ctarget-cpu=sapphirerapids ++ rustflags-$(CONFIG_MROCKETLAKE) += -Ctarget-cpu=rocketlake ++ rustflags-$(CONFIG_MALDERLAKE) += -Ctarget-cpu=alderlake ++ rustflags-$(CONFIG_MRAPTORLAKE) += -Ctarget-cpu=raptorlake ++ rustflags-$(CONFIG_MMETEORLAKE) += -Ctarget-cpu=meteorlake ++ rustflags-$(CONFIG_MEMERALDRAPIDS) += -Ctarget-cpu=emeraldrapids + KBUILD_RUSTFLAGS += $(rustflags-y) + + KBUILD_CFLAGS += -mno-red-zone diff --git a/arch/x86/include/asm/vermagic.h b/arch/x86/include/asm/vermagic.h -index 75884d2cdec37..7acca9b5a9d56 100644 +index 75884d2cdec3..f4e29563473d 100644 --- a/arch/x86/include/asm/vermagic.h +++ b/arch/x86/include/asm/vermagic.h @@ -17,6 +17,54 @@ @@ -761,7 +722,7 @@ index 75884d2cdec37..7acca9b5a9d56 100644 #elif defined CONFIG_MATOM #define MODULE_PROC_FAMILY "ATOM " #elif defined CONFIG_M686 -@@ -35,6 +83,34 @@ +@@ -35,6 +83,28 @@ #define MODULE_PROC_FAMILY "K7 " #elif defined CONFIG_MK8 #define MODULE_PROC_FAMILY "K8 " @@ -787,15 +748,9 @@ index 75884d2cdec37..7acca9b5a9d56 100644 +#define MODULE_PROC_FAMILY "ZEN " +#elif defined CONFIG_MZEN2 +#define MODULE_PROC_FAMILY "ZEN2 " -+#elif defined CONFIG_MZEN3 -+#define MODULE_PROC_FAMILY "ZEN3 " -+#elif defined CONFIG_MZEN4 -+#define MODULE_PROC_FAMILY "ZEN4 " -+#elif defined CONFIG_MZEN5 -+#define MODULE_PROC_FAMILY "ZEN5 " #elif defined CONFIG_MELAN #define MODULE_PROC_FAMILY "ELAN " #elif defined CONFIG_MCRUSOE --- -2.45.0 +-- +2.46.2
