Did you enable SMP when you compiled your kernel?
Em Sexta, 23 de Setembro de 2005 23:05, o A. Khattri escreveu:
> On Fri, 23 Sep 2005, kashani wrote:
> > A. Khattri wrote:
> > > I switched on SMP and HT when building my kernel but I see this among
> > > the boot messages:
> > >
> > > CPU: After generic identify, caps: bfebfbff 00000000 00000000 00000000
> > > 0000441d 00000000 00000000
> > > CPU: After vendor identify, caps: bfebfbff 00000000 00000000 00000000
> > > 0000441d 00000000 00000000
> > > monitor/mwait feature present.
> > > using mwait in idle threads.
> > > CPU: Trace cache: 12K uops, L1 D cache: 16K
> > > CPU: L2 cache: 1024K
> > > CPU: Hyper-Threading is disabled
> >
> > Is it possible it's disabled in the Bios? Some servers shipped that way
> > when they first came out IIRC.
>
> I didn't find any BIOS setting unfortunately...
>
> This is a Supermicro 5013C-T server with a P4 (P4SCE?) board in it.
>
> # cat /proc/cpuinfo
> processor : 0
> vendor_id : GenuineIntel
> cpu family : 15
> model : 4
> model name : Intel(R) Pentium(R) 4 CPU 2.40GHz
> stepping : 1
> cpu MHz : 2395.003
> cache size : 1024 KB
> fdiv_bug : no
> hlt_bug : no
> f00f_bug : no
> coma_bug : no
> fpu : yes
> fpu_exception : yes
> cpuid level : 5
> wp : yes
> flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca
> cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni monitor
> ds_cpl cid xtpr
> bogomips : 4718.59
>
>
> --
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