begin quote On Tue, 26 Aug 2003 10:22:25 +0300 Janne Johansson <[EMAIL PROTECTED]> wrote:
> On Tue, 2003-08-26 at 03:18, Spider wrote:
>
> > Yes, -march=athlon-xp will enable SSE2 for instruction handling..
> > Not good in this case.
> >
> > you could however (try) and use -march=athlon
>
> As I see it, the newer durons (morgan core) are indeed scaled down
> athlon-xps, and will work with the athlon-xp set. Two machines of mine
> are morgan durons, and have been installed with athlon-xp set as the
> march.
>
> The cat /proc/cpuinfo does give the same flags as my real athlon-xp
> machine. Any way, I don't remember that my real xp had support for
> sse2, just mmx2 and 3DNowEx (in addition to 3DNow, mmx and sse), and I
> don't know if any amd-cpu has support for sse2.
>
Ahh, in reply, sorry.. here's the real stats:
{"athlon-tbird",PROCESSOR_ATHLON, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW
| PTA_3DNOW_A},
{"athlon-xp", PROCESSOR_ATHLON, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW
| PTA_3DNOW_A | PTA_SSE},
Whereas athlon-tbird has the same flags as athlon, so it isn't SSE2 as I
in tired delerious stated, but the PTA_SSE flag that differs them
(config/i386/i386.c in the gcc source tree)
//Spider
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