I am operating a stage one installation of gentoo. I set USE flags and compiled everything (including the 2.4.24 plain vanilla kernel) for dual MP 2800+ processors on a Tyan Thunder K7x Pro motherboard.
My first question is, "Can somebody point me to a program for positive processor identification?" My supplier charged me for MP 2800+ processors, but both BIOS and KDE info center identify MP 2600+. I looked-up specs on the ATHLON web site. Apparently, false ID is common for these processors. Specs for the MP 2800+ permit a 512 KB cache, but this size cache is not available for the 2600+. Here is what KDE processor info center shows: processor 0 vendor_id AuthenticAMD cpu family 6 model 10 model name AMD Athlon(tm) MP 2600+ stepping 0 cpu MHz 2133.434 cache size 512 KB fdiv_bug no hit_bug no f00f_bug no coma_bug no fpu yes fpu_exception yes cpuid level 1 wp yes flags fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 mmx fxsr sse syscall mp mmxext 3dnowext 3dnow bogomips 4246.73 processor 0 vendor_id AuthenticAMD cpu family 6 model 10 model name AMD Athlon(tm) Processor stepping 0 cpu MHz 2133.434 cache size 512 KB fdiv_bug no hit_bug no f00f_bug no coma_bug no fpu yes fpu_exception yes cpuid level 1 wp yes flags fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 mmx fxsr sse syscall mp mmxext 3dnowext 3dnow bogomips 4259.84 ------------------------------------------------------------------------------ My second question is, "What is broken? KSim, or use of my second processor? No matter what the operation, KSim indicates use of only cpu 0, never cpu 1. Even when cpu 0 is at 100%, cpu 1 is not used." Here is some of my startup log: Jan 31 00:53:47 larrus2 Processor #1 Pentium(tm) Pro APIC version 16 Jan 31 00:53:47 larrus2 ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled) Jan 31 00:53:47 larrus2 Processor #0 Pentium(tm) Pro APIC version 16 Jan 31 00:53:47 larrus2 ACPI: LAPIC_NMI (acpi_id[0x00] polarity[0x1] trigger[0x1] lint[0x1]) Jan 31 00:53:47 larrus2 ACPI: LAPIC_NMI (acpi_id[0x01] polarity[0x1] trigger[0x1] lint[0x1]) Jan 31 00:53:47 larrus2 Using ACPI for processor (LAPIC) configuration information Jan 31 00:53:47 larrus2 Intel MultiProcessor Specification v1.4 Jan 31 00:53:47 larrus2 Virtual Wire compatibility mode. Jan 31 00:53:47 larrus2 OEM ID: TYAN Product ID: PAULANER APIC at: 0xFEE00000 Jan 31 00:53:47 larrus2 I/O APIC #2 Version 17 at 0xFEC00000. Jan 31 00:53:47 larrus2 Enabling APIC mode: Flat. Using 1 I/O APICs Jan 31 00:53:47 larrus2 Processors: 2 Jan 31 00:53:47 larrus2 Kernel command line: root=/dev/sda5 vga=ext Jan 31 00:53:47 larrus2 Initializing CPU#0 Jan 31 00:53:47 larrus2 Detected 2133.434 MHz processor. Jan 31 00:53:47 larrus2 Console: colour VGA+ 80x50 Jan 31 00:53:47 larrus2 Calibrating delay loop... 4246.73 BogoMIPS Jan 31 00:53:47 larrus2 Memory: 2068272k/2096640k available (2113k kernel code, 27916k reserved, 686k data, 116k init, 1179072k highmem) Jan 31 00:53:47 larrus2 Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes) Jan 31 00:53:47 larrus2 Inode cache hash table entries: 131072 (order: 8, 1048576 bytes) Jan 31 00:53:47 larrus2 Mount cache hash table entries: 512 (order: 0, 4096 bytes) Jan 31 00:53:47 larrus2 Buffer cache hash table entries: 131072 (order: 7, 524288 bytes) Jan 31 00:53:47 larrus2 Page-cache hash table entries: 524288 (order: 9, 2097152 bytes) Jan 31 00:53:47 larrus2 CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) Jan 31 00:53:47 larrus2 CPU: L2 Cache: 512K (64 bytes/line) Jan 31 00:53:47 larrus2 Intel machine check architecture supported. Jan 31 00:53:47 larrus2 Intel machine check reporting enabled on CPU#0. Jan 31 00:53:47 larrus2 CPU: After generic, caps: 0383fbff c1cbfbff 00000000 00000000 Jan 31 00:53:47 larrus2 CPU: Common caps: 0383fbff c1cbfbff 00000000 00000000 Jan 31 00:53:47 larrus2 Enabling fast FPU save and restore... done. Jan 31 00:53:47 larrus2 Enabling unmasked SIMD FPU exception support... done. Jan 31 00:53:47 larrus2 Checking 'hlt' instruction... OK. Jan 31 00:53:47 larrus2 POSIX conformance testing by UNIFIX Jan 31 00:53:47 larrus2 CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) Jan 31 00:53:47 larrus2 CPU: L2 Cache: 512K (64 bytes/line) Jan 31 00:53:47 larrus2 Intel machine check reporting enabled on CPU#0. Jan 31 00:53:47 larrus2 CPU: After generic, caps: 0383fbff c1cbfbff 00000000 00000000 Jan 31 00:53:47 larrus2 CPU: Common caps: 0383fbff c1cbfbff 00000000 00000000 Jan 31 00:53:47 larrus2 CPU0: AMD Athlon(tm) MP 2600+ stepping 00 Jan 31 00:53:47 larrus2 per-CPU timeslice cutoff: 1462.85 usecs. Jan 31 00:53:47 larrus2 masked ExtINT on CPU#0 Jan 31 00:53:47 larrus2 ESR value before enabling vector: 00000000 Jan 31 00:53:47 larrus2 ESR value after enabling vector: 00000000 Jan 31 00:53:47 larrus2 Booting processor 1/0 eip 2000 Jan 31 00:53:47 larrus2 Initializing CPU#1 Jan 31 00:53:47 larrus2 masked ExtINT on CPU#1 Jan 31 00:53:47 larrus2 ESR value before enabling vector: 00000000 Jan 31 00:53:47 larrus2 ESR value after enabling vector: 00000000 Jan 31 00:53:47 larrus2 Calibrating delay loop... 4259.84 BogoMIPS Jan 31 00:53:47 larrus2 CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) Jan 31 00:53:47 larrus2 CPU: L2 Cache: 512K (64 bytes/line) Jan 31 00:53:47 larrus2 Intel machine check reporting enabled on CPU#1. Jan 31 00:53:47 larrus2 CPU: After generic, caps: 0383fbff c1cbfbff 00000000 00000000 Jan 31 00:53:47 larrus2 CPU: Common caps: 0383fbff c1cbfbff 00000000 00000000 Jan 31 00:53:47 larrus2 CPU1: AMD Athlon(tm) Processor stepping 00 Jan 31 00:53:47 larrus2 Total of 2 processors activated (8506.57 BogoMIPS). Jan 31 00:53:47 larrus2 ENABLING IO-APIC IRQs Jan 31 00:53:47 larrus2 Setting 2 in the phys_id_present_map Jan 31 00:53:47 larrus2 ...changing IO-APIC physical APIC ID to 2 ... ok. Jan 31 00:53:47 larrus2 init IO_APIC IRQs Jan 31 00:53:47 larrus2 IO-APIC (apicid-pin) 2-0, 2-5, 2-9, 2-10, 2-11, 2-20, 2-21, 2-22, 2-23 not connected. Jan 31 00:53:47 larrus2 ..TIMER: vector=0x31 pin1=2 pin2=0 Jan 31 00:53:47 larrus2 number of MP IRQ sources: 18. Jan 31 00:53:47 larrus2 number of IO-APIC #2 registers: 24. Jan 31 00:53:47 larrus2 testing the IO APIC....................... Jan 31 00:53:47 larrus2 Jan 31 00:53:47 larrus2 IO APIC #2...... Jan 31 00:53:47 larrus2 .... register #00: 02000000 Jan 31 00:53:47 larrus2 ....... : physical APIC id: 02 Jan 31 00:53:47 larrus2 ....... : Delivery Type: 0 Jan 31 00:53:47 larrus2 ....... : LTS : 0 Jan 31 00:53:47 larrus2 .... register #01: 00170011 Jan 31 00:53:47 larrus2 ....... : max redirection entries: 0017 Jan 31 00:53:47 larrus2 ....... : PRQ implemented: 0 Jan 31 00:53:47 larrus2 ....... : IO APIC version: 0011 Jan 31 00:53:47 larrus2 .... register #02: 00000000 Jan 31 00:53:47 larrus2 ....... : arbitration: 00 Jan 31 00:53:47 larrus2 .... IRQ redirection table: Jan 31 00:53:47 larrus2 NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect: Jan 31 00:53:47 larrus2 00 000 00 1 0 0 0 0 0 0 00 Jan 31 00:53:47 larrus2 01 003 03 0 0 0 0 0 1 1 39 Jan 31 00:53:47 larrus2 02 003 03 0 0 0 0 0 1 1 31 Jan 31 00:53:47 larrus2 03 003 03 0 0 0 0 0 1 1 41 Jan 31 00:53:47 larrus2 04 003 03 0 0 0 0 0 1 1 49 Jan 31 00:53:47 larrus2 05 000 00 1 0 0 0 0 0 0 00 Jan 31 00:53:47 larrus2 06 003 03 0 0 0 0 0 1 1 51 Jan 31 00:53:47 larrus2 07 003 03 0 0 0 0 0 1 1 59 Jan 31 00:53:47 larrus2 08 003 03 0 0 0 0 0 1 1 61 Jan 31 00:53:47 larrus2 09 000 00 1 0 0 0 0 0 0 00 Jan 31 00:53:47 larrus2 0a 000 00 1 0 0 0 0 0 0 00 Jan 31 00:53:47 larrus2 0b 000 00 1 0 0 0 0 0 0 00 Jan 31 00:53:47 larrus2 0c 003 03 0 0 0 0 0 1 1 69 Jan 31 00:53:47 larrus2 0d 003 03 0 0 0 0 0 1 1 71 Jan 31 00:53:47 larrus2 0e 003 03 0 0 0 0 0 1 1 79 Jan 31 00:53:47 larrus2 0f 003 03 0 0 0 0 0 1 1 81 Jan 31 00:53:47 larrus2 10 003 03 1 1 0 1 0 1 1 89 Jan 31 00:53:47 larrus2 11 003 03 1 1 0 1 0 1 1 91 Jan 31 00:53:47 larrus2 12 003 03 1 1 0 1 0 1 1 99 Jan 31 00:53:47 larrus2 13 003 03 1 1 0 1 0 1 1 A1 Jan 31 00:53:47 larrus2 14 000 00 1 0 0 0 0 0 0 00 Jan 31 00:53:47 larrus2 15 000 00 1 0 0 0 0 0 0 00 Jan 31 00:53:47 larrus2 16 000 00 1 0 0 0 0 0 0 00 Jan 31 00:53:47 larrus2 17 000 00 1 0 0 0 0 0 0 00 Jan 31 00:53:47 larrus2 IRQ to pin mappings: Jan 31 00:53:47 larrus2 IRQ0 -> 0:2 Jan 31 00:53:47 larrus2 IRQ1 -> 0:1 Jan 31 00:53:47 larrus2 IRQ3 -> 0:3 Jan 31 00:53:47 larrus2 IRQ4 -> 0:4 Jan 31 00:53:47 larrus2 IRQ6 -> 0:6 Jan 31 00:53:47 larrus2 IRQ7 -> 0:7 Jan 31 00:53:47 larrus2 IRQ8 -> 0:8 Jan 31 00:53:47 larrus2 IRQ12 -> 0:12 Jan 31 00:53:47 larrus2 IRQ13 -> 0:13 Jan 31 00:53:47 larrus2 IRQ14 -> 0:14 Jan 31 00:53:47 larrus2 IRQ15 -> 0:15 Jan 31 00:53:47 larrus2 IRQ16 -> 0:16 Jan 31 00:53:47 larrus2 IRQ17 -> 0:17 Jan 31 00:53:47 larrus2 IRQ18 -> 0:18 Jan 31 00:53:47 larrus2 IRQ19 -> 0:19 Jan 31 00:53:47 larrus2 .................................... done. Jan 31 00:53:47 larrus2 Using local APIC timer interrupts. Jan 31 00:53:47 larrus2 calibrating APIC timer ... Jan 31 00:53:47 larrus2 ..... CPU clock speed is 2133.4524 MHz. Jan 31 00:53:47 larrus2 ..... host bus clock speed is 266.6816 MHz. Jan 31 00:53:47 larrus2 cpu: 0, clocks: 2666816, slice: 888938 Jan 31 00:53:47 larrus2 CPU0<T0:2666816,T1:1777872,D:6,S:888938,C:2666816> Jan 31 00:53:47 larrus2 cpu: 1, clocks: 2666816, slice: 888938 Jan 31 00:53:47 larrus2 CPU1<T0:2666816,T1:888928,D:12,S:888938,C:2666816> Jan 31 00:53:47 larrus2 checking TSC synchronization across CPUs: passed. Jan 31 00:53:47 larrus2 Waiting on wait_init_idle (map = 0x2) Jan 31 00:53:47 larrus2 All processors have done init_idle -- [EMAIL PROTECTED] mailing list
