Helmut Jarausch writes:
> On 03/12/2012 12:32:01 PM, Alex Schuster wrote:
> > The command above does not tell about SSE stuff, so I used this one to
> > find out about that:
> >
> > leela # echo | gcc -dME - -march=native | grep -Ei 'SSE|3DNOW|MMX' |
Typo: The -E must be separate: gcc -dM -E - -march=native
> > sort
> > #define __3dNOW_A__ 1
> > #define __3dNOW__ 1
> > #define __MMX__ 1
> > #define __SSE2_MATH__ 1
> > #define __SSE2__ 1
> > #define __SSE3__ 1
> > #define __SSE4A__ 1
> > #define __SSE_MATH__ 1
> > #define __SSE__ 1
> >
> > And I added "-msse -msse2 -msse3 -msse4 -m3dnow -mmmx" to CFLAGS.
> I normally check the flags entry in cat /proc/cpuinfo to decide
> what's supported on a given CPU.
This gives: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext
fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl
nonstop_tsc extd_apicid aperfmperf pni monitor cx16 popcnt lahf_lm
cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch
osvw ibs skinit wdt arat cpb npt lbrv svm_lock nrip_save pausefilter
I see sse, sse2, pni (which means sse3 I think) and sse4a. Like what the
gcc output gives.
But then I looked in the gcc man page, and the relevant switches are:
-msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 ... -msse4a
With the -msse4a switch being a little separated from the others, maybe I
overlooked it when I looked the last time. So, the CPU knows about SSE4a,
but not about SSE4. Argh. I somehow thought that this would be the same
as SSE4, according to wikipedia this is not true. Problem found, I guess.
Wonko
