On Thu, Sep 20, 2018 at 01:00:39AM +0300, gevisz wrote > ????, 19 ????????. 2018 ??. ?? 11:38, Walter Dnes <waltd...@waltdnes.org>:
> > According to > > http://www.cpu-world.com/sspec/SL/SLA8Z.html it has... > > > > MMX SSE SSE2 SSE3 SSSE3 > > Do you mean that it would be enough to set > CFLAGS="-O2 -pipe mmx sse sse2 sse3 ssse3" > without setting the march cflag at all? Yes, that would work. Remember also to include in make.conf CPU_FLAGS_X86="mmx mmxext sse sse2 sse3 ssse3" In your jpeg image, I see that the flags include mmx, sse, sse2, pni, and ssse3. "pni" == "Prescott New Instructions" == "SSE3". Looking at https://gcc.gnu.org/onlinedocs/gcc-7.3.0/gcc/x86-Options.html#x86-Options I suggest "-march=core2" with CPU_FLAGS_X86 same as above. The "core2" option uses MMX, SSE, SSE2, SSE3 and SSSE3 instructions, all of which show up in the listing on your jpeg. https://en.wikipedia.org/wiki/SSE3 > SSE3, Streaming SIMD Extensions 3, also known by its Intel code name > Prescott New Instructions (PNI), is the third iteration of the SSE > instruction set for the IA-32 (x86) architecture. -- Walter Dnes <waltd...@waltdnes.org> I don't run "desktop environments"; I run useful applications
