laforge has submitted this change. ( https://gerrit.osmocom.org/c/pysim/+/33695 
)

 (

3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted 
one.
 )Change subject: cards: All derived of SimCardBase use CLA=A0; all 
UiccCardBase use CLA=00
......................................................................

cards: All derived of SimCardBase use CLA=A0; all UiccCardBase use CLA=00

Change-Id: Id61b549f68410631529349ee62b08a102f609405
---
M pySim/cards.py
M pySim/legacy/cards.py
2 files changed, 15 insertions(+), 4 deletions(-)

Approvals:
  fixeria: Looks good to me, approved
  Jenkins Builder: Verified




diff --git a/pySim/cards.py b/pySim/cards.py
index 3acc7aa..d720413 100644
--- a/pySim/cards.py
+++ b/pySim/cards.py
@@ -83,6 +83,10 @@
     any higher-layer processing."""
     name = 'SIM'

+    def __init__(self, scc: LinkBase):
+        super(SimCardBase, self).__init__(scc)
+        self._scc.cla_byte = "A0"
+
     def probe(self) -> bool:
         df_gsm = DF_GSM()
         return self.file_exists(df_gsm.fid)
@@ -93,7 +97,8 @@

     def __init__(self, ssc: LinkBase):
         super(UiccCardBase, self).__init__(ssc)
-           # See also: ETSI TS 102 221, Table 9.3
+        self._scc.cla_byte = "00"
+        # See also: ETSI TS 102 221, Table 9.3
         self._adm_chv_num = 0xA0

     def probe(self) -> bool:
diff --git a/pySim/legacy/cards.py b/pySim/legacy/cards.py
index ae5cf79..d4e5862 100644
--- a/pySim/legacy/cards.py
+++ b/pySim/legacy/cards.py
@@ -893,7 +893,6 @@

     def __init__(self, ssc):
         super(SysmoUSIMSJS1, self).__init__(ssc)
-        self._scc.cla_byte = "00"
         self._scc.sel_ctrl = "0004"  # request an FCP

     @classmethod
@@ -1206,7 +1205,6 @@
     def __init__(self, ssc):
         super(WavemobileSim, self).__init__(ssc)
         self._adm_chv_num = 0x0A
-        self._scc.cla_byte = "00"
         self._scc.sel_ctrl = "0004"  # request an FCP

     @classmethod
@@ -1301,7 +1299,6 @@

     def __init__(self, ssc):
         super(SysmoISIMSJA2, self).__init__(ssc)
-        self._scc.cla_byte = "00"
         self._scc.sel_ctrl = "0004"  # request an FCP

     @classmethod

--
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Gerrit-Project: pysim
Gerrit-Branch: master
Gerrit-Change-Id: Id61b549f68410631529349ee62b08a102f609405
Gerrit-Change-Number: 33695
Gerrit-PatchSet: 5
Gerrit-Owner: laforge <[email protected]>
Gerrit-Reviewer: Jenkins Builder
Gerrit-Reviewer: fixeria <[email protected]>
Gerrit-Reviewer: laforge <[email protected]>
Gerrit-MessageType: merged

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