Re: Synchronized MMIO access on SMP

[Andreas Beck]

> Doesn't the chipset prevent SMP cpu's from accessing MMIO's at the same
> time?

In a sense yes. Of course the writes will be serialized, so as to avoid a
bus clash, but it does not disallow something like 

CPU1: setcolor yellow
CPU2: setcolor blue
CPU1: render rectangle

CU, Andy

-- 
= Andreas Beck                    |  Email :  <[EMAIL PROTECTED]> =