> On Sat, 27 Nov 1999, Andreas Beck wrote:
> > > Isn't the ramdac clock always the same as the pixel clock?
> >
> > Not quite, depending on the exact definition of pixel clock.
> > Using doubling-capabilities of the chipset, it may well be, that the
> > programmed clock of the clock systhesizer is higher than what the ramdac
> > gets. However it might as well be, that the ramdac is still driven at the
> > high frequency, just getting allways the same pixel twice. Depends on
> > implementation.
>
> IC, you mean the pixel doubling on some S3s?
One should clearly distinguish between the {D}ot-, {L}oad- and
{R}eference clock rate. DCLK is determined by the monitor timings only.
LCLK is determined mainly by the ramdac-databus width and color model.
RCLK is the clock rate the clock generator has to deliver. RCLK may
differ from DCLK and LCLK if you have a phased locked loop
setup with the chipset involved. There it depends mainly on the chipset
what value RCLK has to have.
More explanations can be found in the GGI mailing list archives.
> But if the RAMDAC clock is different from the pixel clock, it's something to be
> managed by the driver internally, right?
If you choose to have a ramdac driver included in every driver and take
the choice of maintaining these, you are right.
> Gr{oetje,eeting}s,
> --
> Geert Uytterhoeven -- Linux/{m68k~Amiga,PPC~CHRP} -- [EMAIL PROTECTED]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
Steffen
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