Hey All, Is there any reasons *not* to add SSE / AVX register support to the llvm 32 bit x86 ghc calling convention? It looks like (as with x86_64) that adding additional simd registers to the calling convention would be fully backwards compatible with current ghc approach to 32bit function calls, but would allow ghc 32bit (at some future point) to have decent floating point performance when applicable.
I'm ok either way, but would be helpful to get some opinions. just to recap, i'm working on getting a patch sorted out for adding AVX support to the ghc x86_64 LLVM calling convention http://ghc.haskell.org/trac/ghc/ticket/8033, and now would be a good time to add anything to the 32bit x86 calling convention thanks -Carter
_______________________________________________ ghc-devs mailing list [email protected] http://www.haskell.org/mailman/listinfo/ghc-devs
