2018-05-06 16:41 GMT+02:00 Andreas Klebinger <[email protected]>:
> [...] If we only consider 16byte (DSB Buffer) and 32 Byte (Cache Lines) > relevant this reduces the possibilities by a lot after all. [...] > Nitpick: Cache lines on basically all Intel/AMD processors contain 64 bytes, see e.g. http://www.agner.org/optimize/microarchitecture.pdf
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