On Dec 4, 2007 10:09 PM, Tristan Gingold <[EMAIL PROTECTED]> wrote: > On Tue, Dec 04, 2007 at 04:05:08PM -0500, Pascal Giard wrote: > > Hmmm... beyond the cpu arch problem, i still seem to be missing something. > > > > On x86-32 arch, simulation never really starts. Note that if i get > > signal values at the end of simulation, i see that the signal i've put > > has been set correctly. But, the output isn't updated. > > > > On x86-64 arch, nothing happens. > > > > For detailed output, see below. > > > > I've attached the code. > > To analyze, build and run, simply run "make verify". > > > > The design is a simple XOR with 2 bit inputs and 2 bit outputs. > > Hi, > > here are my modifications to have an output.
Thank you Tristan! So, from your modifications, i understand that i need a testbench that will generate at least dummy events. Would it be wrong to say that it's the only way to run the design for a certain amount of time? To make things clearer, I want to do something like: 1) start the design in standby mode, waiting for network events that will drive signal values 2) set signals once they're received 3) simulate for a given time 4) send back results over network Is there a way i can pause/resume simulation from current implementation of VPI? Richard, if you are reading this, in your paper you seem to use GHDL as a "slave". How did you "control" simulation? Finally, note that it still doesn't work in native 64bit, i need to run in a 32bit chroot or on a native 32bit cpu. Do you have tips/hints on tracking the root of the issue? As usual, tips/hints/suggestions are most welcome. cheers, -Pascal -- Homepage (http://organact.mine.nu) Debian GNU/Linux (http://www.debian.org) LACIME: École de technologie supérieure (http://lacime.etsmtl.ca) _______________________________________________ Ghdl-discuss mailing list Ghdl-discuss@gna.org https://mail.gna.org/listinfo/ghdl-discuss
